2-Pin Debug Port
Serial Wire Debug (SWD) provides a debug port for severely pin-limited packages, often the case for small package microcontrollers but also complex ASICs, where limiting pin count is critical and can be the controlling factor in device costs.
SWD replaces the 5-pin JTAG port with a clock + single bi-directional data pin, providing all the normal JTAG debug and test functionality plus real-time access to system memory without halting the processor or requiring any target resident code. SWD uses an Arm standard bi-directional wire protocol, defined in the Arm Debug Interface v5, to pass data to and from the debugger and the target system in a highly efficient and standard way. As a standard interface for Arm processor-based devices, the software developer can count on a wide choice of interoperable tools from Arm and third party tool vendors.
- Only 2 pins required - vital for very low connectivity devices or packages.
- Provides debug and test communication to JTAG TAP controllers.
- Enables the debugger to become another AMBA bus master for access to system memory and peripheral or debug registers.
- High performance data rates - 4 Mbytes/sec @ 50 MHz.
- Low power - no extra power or ground pins required.
- Small silicon area - 2.5k additional gates.
- Low tools costs, $100 build costs - may be built in to evaluation boards.
- Reliable - built in error detection.
- Safe - protection from glitches on pins when tools are not connected.
SWD provides an easy and risk-free migration from JTAG as the two signals, SWDIO and SWCLK, are overlaid on the TMS and TCK pins, allowing for bi-modal devices that provide the other JTAG signals. These extra JTAG pins are available for other uses when in SWD mode.
SWD is compatible with all Arm processors and any processor using JTAG for debug and provides access to debug registers in Cortex processors (A, R, and M) and the CoreSight debug infrastructure.
Serial Wire technology is today a part of mass production devices such as the ST® STM32 microcontroller.