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Glossary

ADS

See ARM Developer Suite.

ADU

See ARM Debugger for UNIX.

ADW

See ARM Debugger for Windows.

AFU

See ARM Flash Utility.

AFS

See ARM Firmware Suite.

Angel

Angel is a program that enables you to develop and debug applications running on ARM-based hardware. Angel can debug applications running in either ARM state or Thumb state.

ANSI

American National Standards Institute.

API

See Application Programming Interface.

Application Programming Interface

The syntax of the functions and procedures within a module or library.

ARM Boot Flash Utility

The ARM Boot Flash Utility (BootFU) allows modification of the specific boot flash sector on the system.

ARM Debugger for UNIX

The ARM Debugger for UNIX (ADU) and ARM Debugger for Windows (ADW) are two versions of the same ARM debugger software, running under UNIX or Windows respectively.

ARM Debugger for Windows

See ARM Debugger for Unix.

ARM Developer Suite

A suite of applications, together with supporting documentation and examples, that enable you to write and debug applications for the ARM family of RISC processors.

ARM eXtendable Debugger

The ARM eXtendable Debugger (AXD) is the latest debugger software from ARM that enables you to make use of a debug agent in order to examine and control the execution of software running on a debug target. AXD is supplied in both Windows and UNIX versions.

ARM Firmware Suite

A collection of utilities to assist in developing applications and operating systems on ARM-based systems.

ARM Flash Utility

The ARM Flash Utility (AFU) is an application for manipulating and storing data within a system that uses the flash library.

armsd

The ARM Symbolic Debugger (armsd) is an interactive source-level debugger providing high-level debugging support for languages such as C, and low-level support for assembly language. It is a command-line debugger that runs on all supported platforms.

ARMulator

ARMulator is an instruction set simulator. It is a collection of modules that simulate the instruction sets and architecture of various ARM processors.

ATPCS

The ARM and Thumb Procedure Call Standard (ATPCS) defines how registers and the stack are used for subroutine calls.

AXD

See ARM eXtendable Debugger.

Big-Endian

Memory organization where the least significant byte of a word is at a higher address than the most significant byte. See also Little-Endian.

BootFU

See ARM Boot Flash Utility.

Boot monitor

A ROM-based monitor that communicates with a host computer using simple commands over a serial port. Typically this application is used to display the contents of memory and provide system debug and self-test functions.

Boot switcher

The boot switcher selects and runs an image in application flash. You can store one or more code images in flash memory and use the boot switcher to start the image at reset.

Canonical Frame Address

In DWARF 2, this is an address on the stack specifying where the call frame of an interrupted function is located.

CFA

See Canonical Frame Address.

CodeWarrior IDE

The development environment for the ARM Developer Suite.

Coprocessor

An additional processor which is used for certain operations. Usually used for floating-point math calculations, signal processing, or memory management.

Debugger

An application that monitors and controls the execution of a second application. Usually used to find errors in the application program flow.

Double word

A 64-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.

DWARF

Debug With Arbitrary Record Format (DWARF) is a format for debug tables.

EC++

A variant of C++ designed to be used for embedded applications.

ELF

Executable and Linking Format

Environment

The actual hardware and operating system that an application will run on.

Execution view

The address of regions and sections after the image has been loaded into memory and started execution.

Flash memory

Nonvolatile memory that is often used to hold application code.

HAL

See Hardware Abstraction Layer.

Halfword

A 16-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.

Hardware Abstraction Layer

Code designed to conceal hardware differences between different processor systems.

Host

A computer which provides data and other services to another computer.

ICE

In Circuit Emulator.

IDE

Integrated Development Environment, for example the CodeWarrior IDE in ADS.

Image

An executable file which has been loaded onto a processor for execution.

Inline

Functions that are repeated in code each time they are used rather than having a common subroutine. Assembler code placed within a C or C++ program.

See Also Output sections.

Input section

Contains code or initialized data or describes a fragment of memory that must be set to zero before the application starts.

See Also Output sections.

Interworking

Producing an application that uses both ARM and Thumb code.

Library

A collection of assembler or compiler output objects grouped together into a single repository.

Linker

Software which produces a single image from one or more source assembler or compiler output objects.

Little-endian

Memory organization where the least significant byte of a word is at a lower address than the most significant byte. See also Big-endian.

Load view

The address of regions and sections when the image has been loaded into memory but has not yet started execution.

Local

An object that is only accessible to the subroutine that created it.

Memory management unit

Hardware that controls caches and access permissions to blocks of memory, and translates virtual to physical addresses.

Memory protection unit

Hardware that controls permissions to blocks of memory. Unlike an MMU, a MPU does not translate virtual addresses to physical addresses.

MMU

See Memory Management Unit.

MPU

See Memory Protection Unit.

Multi-ICE

Multi-processor JTAG emulator. ARM registered trademark.

Output section

Is a contiguous sequence of input sections that have the same Read Only, Read Write, or Zero Initialized attributes. The sections are grouped together in larger fragments called regions. The regions will be grouped together into the final executable image.

See Also Region.

PCI

See Peripheral Component Interconnect.

PCS

Procedure Call Standard.

See Also ATPCS.

Peripheral Component Interconnect

An expansion bus used with PCs and workstations.

PIC

Position Independent Code.

See Also ROPI.

PID

Position Independent Data.

See Also RWPI.

Profiling

Accumulation of statistics during execution of a program being debugged, to measure performance or to determine critical areas of code.

Call-graph profiling provides great detail but slows execution significantly. Flat profiling provides simpler statistics with less impact on execution speed.

For both types of profiling you can specify the time interval between statistics-collecting operations.

Program image

See Image.

Reentrancy

The ability of a subroutine to have more that one instance of the code active. Each instance of the subroutine call has its own copy of any required static data.

Regions

In an Image, a region is a contiguous sequence of one to three output sections (Read Only, Read Write, and Zero Initialized).

Remapping

Changing the address of physical memory or devices after the application has started executing. This is typically done to allow RAM to replace ROM once the initialization has been done.

Retargeting

The process of moving code designed for one execution environment to a new execution environment.

ROPI

Read Only Position Independent. Code and read-only data addresses can be changed at run-time.

RTOS

Real Time Operating System.

RWPI

Read Write Position Independent. Read/write data addresses can be changed at run-time.

Scatter loading

Assigning the address and grouping of code and data sections individually rather than using single large blocks.

Scope

The accessibility of a function or variable at a particular point in the application code. Symbols which have global scope are always accessible. Symbols with local or private scope are only accessible to code in the same subroutine or object.

Section

A block of software code or data for an Image.

See Also Input sections.

Semihosting

A mechanism whereby the target communicates I/O requests made in the application code to the host system, rather than attempting to support the I/O itself.

SIB

See System Information Block.

SWI

Software Interrupt. An instruction that causes the processor to call a programer-specified subroutine. Used by ARM to handle semihosting.

System Information Block

A block of user-defined nonvolatile storage.

Target

The actual target processor, real or simulated, on which the application is running.

Thread

A context of execution on a processor. A thread is always related to a processor and may or may not be associated with an image.

Vector Floating Point

VFP instructions use a single instruction to perform an arithmetical operation on more than one floating point value.

VFP

See Vector Floating Point.

Veneer

A small block of code used with subroutine calls when there is a requirement to change processor state or branch to an address that cannot be reached from the current processor state.

Watchpoint

A location within the image which will be monitored and which will cause execution to break when it changes.

Word

A 32-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.

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