IOMMU support allows systems to share A-profile page tables with peripherals, providing virtual device support compatibility at the system level with the ARM architecture memory model. Similar to GIC developments, support is evolving to cater for the increasing complexity in larger systems:
- SMMUv2 is a register-based architecture in general use today.
- SMMUv3 is under development with key partners across the ecosystem. This version scales to much larger systems and includes support for features such as the ATS and PRI functionality defined in the PCIe standard. The specification is expected to be published in 2016.