Mali-G72 High Performance GPU

Mali-G72 Block Diagram.

About Mali-G72

Arm Mali-G72 is the second generation Bifrost-based GPU for High Performance products. Benefitting from advanced technologies such as claused shaders and full system coherency, Mali-G72 adds increased tile buffer memory supporting up to 16 x Multi-Sample Anti-Aliasing at minimal performance cost. Arithmetic optimizations tailored to complex Machine Learning and High Fidelity Mobile Gaming use cases provide 25% higher energy efficiency, 20% better performance density and 40% greater overall performance than devices based on previous generation Bifrost GPU.

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Specification

Features Value Description
Anti-Aliasing 4x MSAA
8x MSAA
16x MSAA
Hardware-implemented Full-Scene Multiple Sample Anti-Aliasing. 
API Support OpenGL®ES 1.1, 2.0, 3.0, 3.1, 3.2
Vulkan1.0*
OpenCL™ 1.1, 1.2, 2.0
RenderScript
Full support for next-generation and legacy2D/3D graphics applications.
Bus Interface AMBA®4
ACE & ACE-LITE
Compatible with a wide range of bus interconnect and peripheral IP.
L2 Cache Configurable 128kB-2048kB From 1-4 slices, each configurable from 128kB – 512kB.
Memory System Virtual Memory Built-in Memory Management Unit (MMU) to support virtual memory.
Multi-Core Scaling 1 to 32 cores Optimized for high energy efficiency to address the high-end mobile and consumer device requirements.   
Adaptive Scalable Texture Compression

Low dynamic range (LDR) and high dynamic range (HDR).
Supports both 2D and 3D images
ASTC offers a number of advantages over previous texture compression schemes by improving image quality, while reducing memory bandwidth and thus energy use.
Arm Frame Buffer Compression 4x4 pixel block size AFBC is a lossless image compression format that provides random access to pixel data to a 4x4 pixel block granularity. It is employed to reduce memory bandwidth both internally within the GPU and externally throughout the SoC.
Transaction Elimination 16x16 pixel block size Transaction Elimination spots the identical pixel blocks between two consecutive render targets and performs a partial update to the frame buffer with the changed pixel blocks only, which reduces memory bandwidth and thus energy.
Smart Composition 16x16 pixel block size Smart Composition extends the concept of Transaction Elimination to every stage of UI composition. Identical pixel blocks of input surfaces are not read, not processed for composition and not written to final frame buffer.

Performance - Mali-G72 (MP32)

Features Value Description
Frequency 850 MHz in 16nm (16 FinFET)
Throughput 850 Mtri/s, 27.2 Gpix/s in 16nm (16 FinFET)

Do you want more information about Arm Mali-G72?


  • A desktop, a folder, 3D shapes etc.
  • Development Tools for Graphics and Compute Applications

    A range of development tools to assist in the deployment of graphics applications and content on Mali GPU based systems.

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  • A phone, a tablet, game console etc.
  • Mali Developer Centre

    An online portal for a growing community of developers, technology partners, software vendors and content companies to create a thriving community around Mali embedded graphics IP.

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Answered Where do I find presentations and photos from SC'18? 0 votes 634 views 0 replies Started 3 months ago by John Linford Answer this
Not answered Can I use Mali to access I/O registers?
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Answered How can I debug two A53 cores in DS-5 tool
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Answered Mali T760: Undefined reference to `gbm_bo_get_offset'
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Suggested answer Energy probe issue - No data prints on Streamline
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Answered Where do I find presentations and photos from SC'18? Started 3 months ago by John Linford 0 replies 634 views
Not answered Can I use Mali to access I/O registers? Started 9 hours ago by Zhenyu Ning 0 replies 17 views
Suggested answer DS-5 option "continue_on_error" setting in Eclipse Latest 11 hours ago by NOR 2 replies 83 views
Suggested answer DSTREAM MIPI 60pin Adapter Latest 13 hours ago by je2 2 replies 70 views
Not answered How do I add AHB interface to a processor with Load Store Architecture? Started 15 hours ago by Kedhar Guhan 0 replies 17 views
Not answered Is there any scenario where HWDATA and HRDATA are used simultaneously? Started 15 hours ago by Kedhar Guhan 0 replies 28 views
Answered How can I debug two A53 cores in DS-5 tool Latest 17 hours ago by DriverLike 2 replies 66 views
Answered Mali T760: Undefined reference to `gbm_bo_get_offset' Latest 18 hours ago by Peter Harris 1 replies 52 views
Not answered Fixed-point calculation using CMSIS_library Started 19 hours ago by MnP_Junho 0 replies 35 views
Not answered LCD interfacing with ARM cortex M0+ lpc845 Started yesterday by Aakansha 0 replies 21 views
Suggested answer Energy probe issue - No data prints on Streamline Latest yesterday by Ronan Synnott 1 replies 55 views
Suggested answer Arm C-Compiler Control Flow Graph Generation Latest yesterday by Ronan Synnott 1 replies 86 views