Mali-T860 and Mali-T880 High Performance GPU

Mali-T860 and T880 Block Diagram.

About Mali-T860 GPU and Mali-T880 GPU

The highest performance GPUs built on Arm Mali’s famous Midgard architecture, the Mali-T860 and Mali-T880 GPUs are designed for complex graphics use cases and provide stunning visuals for UHD content. Scalable from 1-16 cores, these GPUs implement new features and optimizations within their micro-architectures such as higher arithmetic throughput to better handle both casual and complex content. Other optimization examples include quad prioritization delivering enhanced performance for UI and casual content, and enhanced Forward Pixel Kill that improves performance for more advanced use cases by eliminating redundant work early in the pipeline. 

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Specification

 Features  Mali-T860 Value  Mali-T880 Value Description
Anti-Aliasing
4x MSAA.
8x MSAA.
16x MSAA.
4x MSAA.
8x MSAA.
16x MSAA.
Hardware implemented Full Scene Multiple Sample Anti-Aliasing.
API Support
OpenGL® ES 1.1, 1.2, 2.0, 3.1, 3.2.
Vulkan 1.0.
OpenCL™ 1.1, 1.2.
RenderScript™.
OpenGL® ES 1.1, 1.2, 2.0, 3.0, 3.1, 3.2.
Vulkan 1.0.
OpenCL™ 1.1, 1.2.
DirectX® 11 FL11_1.
RenderScript™.
Full support for next-generation and legacy 2D/3D graphics applications.
Bus Interface
AMBA®4.
ACE-LITE.
AMBA®4.
ACE-LITE.
Compatible with a wide range of bus interconnect and peripheral IP.
L2 Cache
Configurable 256KB-2048KB.
Configurable 256KB-2048KB.
256KB-512KB for every 4 shader cores.
Memory System
Virtual Memory. Virtual Memory. Built-in Memory Management Unit (MMU) to support virtual memory.
Multi-Core Scaling
1 to 16 cores.
1 to 16 cores.
Optimized for high area and energy efficiency to address the high-end mobile market and consumer device requirements.
Adaptive Scalable Texture Compression (ASTC)
Low Dynamic Range (LDR) and High Dynamic Range (HDR).
Supports both 2D and 3D images.
Low Dynamic Range (LDR) and High Dynamic Range (HDR).
Supports both 2D and 3D images.
ASTC offers a number of advantages over existing texture compression schemes by improving image quality, reducing memory bandwidth and thus energy use.
Arm Frame Buffer Compression (AFBC)
4x4 pixel block size. 4x4 pixel block size. AFBC is a lossless image compression format that provides random access to pixel data to a 4x4 pixel block granularity. It is employed to reduce memory bandwidth both internally within the GPU and externally throughout the SoC.
Transaction Elimination
16x16 pixel block size.
16x16 pixel block size.
Transaction Elimination spots the identical pixel blocks between two consecutive render targets and performs a partial update to the frame buffer with the changed pixel blocks only, which reduces memory bandwidth and thus energy.
Smart Composition
16x16 pixel block size.
16x16 pixel block size.
Smart Composition extends the concept of Transaction Elimination to every stage of UI composition. Identical pixel blocks of input surfaces are not read, not processed for composition and not written to final frame buffer.

Performance - Mali-T860 (MP16)

Feature Value Description
Frequency 650MHz in 28nm HPM
Throughput 1300Mtri/s, 10.4Gpix/s in 28nm HPM

Do you want more information about Arm Mali-T860 and Mali-T880?

  • A desktop, a folder, 3D shapes etc.
  • Development Tools for Graphics and Compute Applications

    A range of development tools to assist in the deployment of graphics applications and content on Mali GPU based systems.

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  • A phone, a tablet, game console etc.
  • Mali Developer Center

    An online portal for a growing community of developers, technology partners, software vendors and content companies to create a thriving community around Mali embedded graphics IP.

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Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Mali-T860 and T880 GPU into their design. 

Arm training courses Open a support case
Answered Where do I find presentations and photos from SC'18? 0 votes 276 views 0 replies Started 1 months ago by John Linford Answer this
Discussion Please consider my tag for inclusion on the ARM Community 0 votes 15961 views 25 replies Latest 15 days ago by SULMIYATDAD Answer this
Not answered DS-5 bare metal wait error after run "debug" 0 votes 11 views 0 replies Started 7 hours ago by CKO Answer this
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Suggested answer FastModels reset
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  • Fast Models
0 votes 306 views 5 replies Latest 23 hours ago by Jason Andrews Answer this
Not answered Slave peripheral driver to DMA PL081, not able to transfer my complete 16KB data from peripheral to memory buffer?
  • PrimeCell DMA Controller (PL081)
  • Linux Developers
0 votes 27 views 0 replies Started yesterday by Vivek_004 Answer this
Discussion online test of register RAM and Flash? 0 votes 34 views 0 replies Started yesterday by Half past nine Answer this
Suggested answer AXI4 Burst Transactions
  • AXI
  • AXI4
0 votes 48 views 1 replies Latest yesterday by Colin Campbell Answer this
Discussion 嵌入式Linux下双网口Socket编程 0 votes 32 views 0 replies Started yesterday by 利尔达徐佳丽 Answer this
Discussion ARM Cortex-A9工业级核心板及其产品应用 0 votes 31 views 0 replies Started yesterday by 利尔达徐佳丽 Answer this
Suggested answer Using GICv2 with FVP
  • gicv2
  • Fixed Virtual Platforms (FVPs)
0 votes 100 views 1 replies Latest yesterday by Jason Andrews Answer this
Answered Where do I find presentations and photos from SC'18? Started 1 months ago by John Linford 0 replies 276 views
Discussion Please consider my tag for inclusion on the ARM Community Latest 15 days ago by SULMIYATDAD 25 replies 15961 views
Not answered DS-5 bare metal wait error after run "debug" Started 7 hours ago by CKO 0 replies 11 views
Discussion 利尔达嵌入式应用EA产品线汇总介绍—All in one Started 11 hours ago by 利尔达徐佳丽 0 replies 16 views
Discussion i.MX6平台复位按键无法复位PMU问题 Started 11 hours ago by 利尔达徐佳丽 0 replies 17 views
Suggested answer FastModels reset Latest 23 hours ago by Jason Andrews 5 replies 306 views
Not answered Slave peripheral driver to DMA PL081, not able to transfer my complete 16KB data from peripheral to memory buffer? Started yesterday by Vivek_004 0 replies 27 views
Discussion online test of register RAM and Flash? Started yesterday by Half past nine 0 replies 34 views
Suggested answer AXI4 Burst Transactions Latest yesterday by Colin Campbell 1 replies 48 views
Discussion 嵌入式Linux下双网口Socket编程 Started yesterday by 利尔达徐佳丽 0 replies 32 views
Discussion ARM Cortex-A9工业级核心板及其产品应用 Started yesterday by 利尔达徐佳丽 0 replies 31 views
Suggested answer Using GICv2 with FVP Latest yesterday by Jason Andrews 1 replies 100 views