Cortex-A32

The Cortex-A32 processor is Arm’s smallest, lowest-power Armv8-A processor optimized for 32-bit embedded applications.

Cortex A-32 chip diagram

Getting Started

The Cortex-A32 processor uses an efficient, 8-stage, in-order pipeline that has been extensively optimized to provide the 32-bit Armv8-A features in the smallest footprint and power.


Specifications

Architecture 32-bit Armv8-A
Multicore 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 4 technology
ISA Support
 
  • AArch32 for full backward compatibility with Armv7
  • TrustZone security technology
  • NEON Advanced SIMD
  • DSP & SIMD extensions
  • VFPv4 Floating point
  • Hardware virtualization support
Debug & Trace
CoreSight DK-A32

Characteristics

The Cortex-A32 processor delivers higher efficiency (performance per mW) and higher performance than the Cortex-A7 and Cortex-A5 processors.

The graph depicts relative performance improvements delivered by the Cortex-A32 processor compared to the Cortex-A5 and Cortex-A7 processors across some of the popular benchmarks. The performance comparisons are for the same clock frequency and same processor configurations. 


  • Manual containing technical information.
  • Cortex-A32 Technical Reference Manual

    For system designers and software engineers, the Cortex-A32 manual provides information on implementing and programming Cortex-A32 based devices.

    Read here
  • A program that is running on a desktop.
  • Cortex-A Series Programmer's Guide for Armv8-A

    Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for Armv8-A.

    Get the guide
  • a ulink, a board, a desktop.
  • Development Tools for Cortex-A

    Arm and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.

    Learn more
  • Line drawing of letter, email etc.
  • Cortex-A32 Whitepaper

    The whitepaper explains how the Cortex-A32 is an ideal stepping stone into the Cortex-A family for traditional Cortex-M products.

    Download

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-A32 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Related IP

The Cortex-A32 processor can be incorporated into an SoC using a broad range of Arm technology including Graphics IP, System IP, and Physical IP. The Cortex-A32 processor is fully supported by Arm development tools. Related IP includes:

 

Graphic IP
Other IP
Tools

Mali-470 GPU

Mali-DP550 display processor

Mali-V550 video processor

CoreLink Interconnect

Interrupt Controllers

CoreLink Cache Coherent Interconnect Family

Memory Controllers

CoreSight SoC-400

POP IP

DS-5 Development Studio

Fixed Virtual Platforms

Development Boards

Arm Compiler

Fast Models

 

Community Forums

Answered Whether Armv7-A has a Write Buffer 0 votes 421 views 8 replies Latest 2 days ago by Yang Wang Answer this
Answered dsb and dmb 0 votes 1041 views 11 replies Latest 4 days ago by digital_kevin Answer this
Answered Armv7 Store Buffer 0 votes 314 views 6 replies Latest 5 days ago by Yang Wang Answer this
Answered Digital design flow (synthesis) 0 votes 558 views 5 replies Latest 5 days ago by Joseph Yiu Answer this
Answered A panic function to halt the processor in low-power sleep using WFI? 1 votes 282 views 5 replies Latest 6 days ago by 42Bastian Schick Answer this
Answered SAU, IDAU, MPC and PPC. What's the difference?
  • Musca-A
  • TrustZone for Armv8-M
  • TrustZone
  • Cortex-M33
2 votes 211 views 2 replies Latest 6 days ago by Afonso Santos Answer this
Answered Whether Armv7-A has a Write Buffer Latest 2 days ago by Yang Wang 8 replies 421 views
Answered dsb and dmb Latest 4 days ago by digital_kevin 11 replies 1041 views
Answered Armv7 Store Buffer Latest 5 days ago by Yang Wang 6 replies 314 views
Answered Digital design flow (synthesis) Latest 5 days ago by Joseph Yiu 5 replies 558 views
Answered A panic function to halt the processor in low-power sleep using WFI? Latest 6 days ago by 42Bastian Schick 5 replies 282 views
Answered SAU, IDAU, MPC and PPC. What's the difference? Latest 6 days ago by Afonso Santos 2 replies 211 views