Cortex-A53 Overview

The Cortex-A53 processor is a high efficiency processor that implements the ARMv8-A architecture. The Cortex-A53 processor has one to four cores, each with an L1 memory system and a single shared L2 cache.

  • Cortex-A53 Technical Reference Manual

    For system designers, system integrators and programmers who design SoC with Cortex-A53, the Technical Reference Manual is the go-to resource.

    Technical Reference Manual
  • Cortex-A Series Programmer's Guide for ARMv8-A

    Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for ARMv8-A.

    Programmer's Guide for ARMv8-A
  • Development Tools for Cortex-A

    ARM and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.

    Development Tools
  • Porting to ARM 64-bit

    If you are migrating from an ARMv7 architecture based design to the ARMv8 64-bit A64 instruction set, we provide a porting guide to help you.

    Porting to ARM 64-bit
  • Cortex-A Safety Documents Package

    For customers who needs to safety certify their end products, ARM provides a Safety Documentation Package for silicon developers and safety certified toolchain to accelerate the time to market.

Cortex-A53 Block Diagram


Architecture ARMv8-A
Multicore 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 4 technology
ISA Support
  • AArch32 for full backward compatibility with ARMv7
  • AArch64 for 64-bit support and new architectural features
  • TrustZone® security technology
  • NEON advanced SIMD
  • DSP & SIMD extensions
  • VFPv4 Floating point
  • Hardware virtualization support
Debug & Trace CoreSight™ DK-A53

Key Features

In-Order Pipeline

Lower power consumption.

Extensive Dual-Issue Capability

Increased peak instruction throughput via dual instruction decode and execution.

Advanced Branch Predictor

Increased branch hit rate with 6Kb Conditional Predictor and 256 entry indirect predictor.

Extensive power-saving features

Hierarchical clock gating, power domains, advanced retention modes.

Cortex-A53 Performance Improvement Relative to Cortex-A7

Cortex-A53 Performance Improvement Relative to Cortex-A7

Cortex-A53 Characteristics

The Cortex-A53 processor delivers significantly more performance than its predecessors at a higher level of power efficiency. This takes the performance of the core above that of the Cortex-A7 processor, which defines many popular mainstream and entry-level mobile platforms. The performance graph to the right shows the performance improvements of the Cortex-A53 processor against the Cortex-A7 processor.

The ARMv8-A architecture brings a number of new features. These include 64-bit data processing, extended virtual addressing and a 64-bit general purpose registers. The Cortex-A53 processor is ARM’s first ARMv8-A processor aimed at providing power-efficient 64-bit processing. It features an in-order, 8-stage, dual-issue pipeline, and improved integer, NEON™, Floating-Point Unit (FPU) and memory performance.

The Cortex-A53 can be implemented in two execution states: AArch32 and AArch64. The AArch64 state gives the Cortex-A53 its ability to execute 64-bit applications, while the AArch32 state allows the processor to execute existing ARMv7-A applications.