Cortex-A53

Applications

Built as a low-power processor with 64-bit capabilities, the Cortex-A53 processor is applicable in a range of devices requiring high performance in power-constrained environments. Some notable deployments include:

Key features

In-order pipeline

Lower power consumption.

Extensive dual-issue capability

Increased peak instruction throughput via dual instruction decode and execution.

Advanced branch predictor

Increased branch hit rate with 6Kb Conditional Predictor and 256 entry indirect predictor.

Extensive power-saving features

Hierarchical clock gating, power domains, advanced retention modes.

Characteristics

The Cortex-A53 processor delivers significantly more performance than its predecessors at a higher level of power efficiency. This takes the performance of the core above that of the Cortex-A7 processor, which defines many popular mainstream and entry-level mobile platforms. The performance graph to the right shows the performance improvements of the Cortex-A53 processor against the Cortex-A7 processor.

The Armv8-A architecture brings a number of new features. These include 64-bit data processing, extended virtual addressing and a 64-bit general purpose registers. The Cortex-A53 processor is Arm’s first Armv8-A processor aimed at providing power-efficient 64-bit processing. It features an in-order, 8-stage, dual-issue pipeline, and improved integer, NEON, Floating-Point Unit (FPU) and memory performance.

The Cortex-A53 can be implemented in two execution states: AArch32 and AArch64. The AArch64 state gives the Cortex-A53 its ability to execute 64-bit applications, while the AArch32 state allows the processor to execute existing Armv7-A applications.

Related IP

The Cortex-A53 processor can be incorporated into a SoC using a broad range of Arm technology including Graphics IP, System IP, and Physical IP. The Cortex-A53 processor is fully supported by Arm development tools. Related IP includes: