You copied the Doc URL to your clipboard.
Cortex-A57 Documentation
- How to pause system level timers while CPU execution is halted
- Arm DynamIQ Shared Unit Technical Reference Manual Revision r3p0
- The JTAG IDCODE for a Cortex processor
- Software implications for v8-A implementations with no hardware floating point
- ARM Processor Cortex-A17 MPCore Product Revision r0 - Software Developers Errata Notice
- ARMv5 Architecture Reference Manual
- Cortex-A57 Cycle Model User Guide
- Cortex-A57 Software Optimization Guide Software Optimization Guide
- ARM Cortex-A57 MPCore Processor Technical Reference Manual Revision r1p3
- ARM Cortex-A57 MPCore Processor Cryptography Extension Technical Reference Manual Revision r1p3
For additional information search for Cortex-A57.