Performance from edge to cloud
The Arm Cortex-A75 CPU is built on DynamIQ technology, enabling new levels of scalability and responsiveness for your advanced use cases.
The processor is broadly applicable from cloud to edge, providing improvements in performance, efficiency, and architecture over its predecessors, the Cortex-A72 and Cortex-A73 processors. With significantly improved integer performance, and substantial enhancements in floating point and memory workloads performance, the Cortex-A75 processor is the most powerful Cortex-A processor to date.
This additional compute capability, combined with improvements for machine learning and other advanced use cases, will enable demanding applications to run more smoothly and provide a new baseline for even more complex workloads to be developed.
Broad market use
With markets ranging from edge to cloud, the Cortex-A75 processor is broadly applicable, and brings new levels of performance, at uncompromised efficiency, to a wide variety of use cases. The processor, in conjunction with the DynamIQ Shared Unit (DSU), supports a configurable feature set that allows Cortex-A75 CPU to cover smartphones, intelligent home devices like DTV, servers, and automotive applications.
The Cortex-A75 processor provides a significant boost in single-thread performance using a fully out-of-order, variable-length, and symmetrical three-way superscalar pipeline. With over 20% more integer core performance and high-performance NEON and FPU engines, the Cortex-A75 processor provides a significant performance boost compared to the Cortex-A72 and Cortex-A73 processors. The CPU also provides additional performance for advanced workloads, like machine learning.
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Efficiency remains one of the most important key metrics for devices where long battery life and user experience are key. Cortex-A75 processor delivers efficiency levels used in devices with Cortex-A73 processor today. This market-leading efficiency allows you to unleash advanced performance, leading to faster devices and better user experiences.
Brand new memory sub-system
The Cortex-A75 processor is built on DynamIQ technology, and as such, is able to leverage many benefits including access to the shared cluster L3 cache, support for asynchronous frequencies, and potentially independent voltage and power rails for individual CPUs or groups of cores. The Cortex-A75 CPU also uses a private L2 cache per core with half the latency of traditional high-performance processors.
By supporting the Armv8-A architecture, the Cortex-A75 processor provides a broad ecosystem from tools to OS and applications support. Additionally, the CPU supports extensions to the architecture to enhance current application and add new use cases. Support includes cache stashing, atomic transactions between agents, cache way allocation and prioritization, or advanced RAS (Reliability, Availability & Serviceability) capabilities.
The Cortex-A75 processor supports the use of 'big' and 'LITTLE' processors in one cluster using DynamIQ technology. Combined with the Cortex-A55 CPU, Arm's most efficient LITTLE processor to date, the Cortex-A75 CPU can extend its dynamic range for thermally limited devices. DynamIQ also enables new combinations, for example 1+7, with great area efficiency, which will enable new upgrade paths for mid-range devices.
More infrastructure performance at market-leading compute density
More performance in sleek smartphone form factors, delivered at best efficiency
Support for ASIL D functional safety using Cortex-R52 safety island
Intelligent devices in your home
Delivers new levels of intelligent performance in your smart home
Great choice for single-board computers (SBCs) with broad ecosystem support
Provides performance needed to power laptops and Chromebooks
Armv8.3 (LDAPR instructions only)
|ISA Support||A64, A32 and T32 instruction sets|
|NEON / Floating Point Unit||Included|
|Max number of CPUs in cluster||Four (4)|
|Physical addressing (PA)||44-bit|
|Memory System and External Interfaces||L1 I-Cache / D-Cache||64KB|
|L2 Cache||256KB to 512KB|
|L3 Cache||Optional, 512KB to 4MB|
|Bus interfaces||ACE or CHI|
|Other||Functional Safety Support||ASIL D|
|Interrupts||GIC interface, GIVv4|
|Debug||Armv8-A (plus Armv8.2-A extensions)|
|Embedded Trace Macrocell||ETMv4.2 (Instruction trace)|
The Cortex-A75 Technical Reference Manual
For system designers, system integrators, and programmers who are designing a SoC, the Technical Reference Manual is the go-to resource.
Cortex-A Series Programmer’s Guide for Armv8.2-A
Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for Armv8.2-A.
Resources, complementary IP and related tools
- The Cortex-A75: Ground-breaking performance for intelligent solutions
- Cortex-A55 developer page and Cortex-A55 launch blog
- Arm DynamIQ: Expanding the possibilities for artificial intelligence
- Arm DynamIQ: Technology for the next era of compute
- Where does big.LITTLE fit in the world of DynamIQ?
- DynamIQ developer page
- Arm Compute Library
- DynamIQ webinar (coming soon)
Arm Design Reviews
Arm's on-site design review service gives licensees confidence that their Cortex-A75 CPU is implemented efficiently, to provide maximum system performance, with lowest risk and fastest time-to-market.Explore Arm Design Reviews
Questions? Request more information
Learn more about Cortex-A75, Arm’s highest performance application CPU, built on Arm DynamIQ technology. Contact us to speak with our technical team.Find out more