Cortex-A8 Technical Reference Manual
Combining a programmers model and micro-architectural details, the Cortex-A8 Technical Reference Manual is a key resource for building or programming Cortex-A8 based SoCs.Technical Reference Manual
Development Tools for Cortex-A
ARM and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.Development Tools
Cortex-A Series Programmer's Guide for ARMv7-A
Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for ARMv7-A.Get the Guide
|Multicore||Single core only|
|Memory Management||ARMv7 Memory Management Unit (MMU)|
|Debug and Trace||CoreSight™ DK-A8|
First ARMv7-A processor
Integrated and configurable L2 Cache Controller
The processor has a number of features which make it ideal for use in high-performance end products. A symmetric, superscalar pipeline allows for full dual-issue capability and high-frequency configurations. There is an advanced branch prediction unit with over 95% accuracy, and an integrated L2 cache provides optimal performance in demanding systems. The Cortex-A8 supports NEON technology, allowing it to take advantage of accelerated multimedia and DSP processing.
The ARM Cortex-A8 processor has the ability to scale in speed from 600MHz to greater than 1GHz, meeting the requirements for power-optimized mobile devices needing operation in less than 300mW and performance-optimized consumer applications.