Cortex-A9

The Cortex-A9 processor is a performance and power optimized multi-core processor and it is one of Arm's most widely deployed and mature applications processors.

Information on Cortex-A9.

Getting Started

The Cortex-A9 processor features a dual-issue, partially out-of-order pipeline and a flexible system architecture with configurable caches and system coherency using the ACP port. The Cortex-A9 processor achieves a better than 50% performance over the Cortex-A8 processor in a single-core configuration.

Characteristics

The Cortex-A9 processor is a performance and power optimized multi-core processor. It features a dual-issue, partially out-of-order pipeline and a flexible system architecture with configurable caches and system coherency using ACP port. The Cortex-A9 processor achieves a better than 50% performance over the Cortex-A8 processor in a single-core configuration.


  • Manual containing technical information.
  • Cortex-A9 Technical Reference Manual

    For system designers and software engineers, the Cortex-A9 manual provides information on implementing and programming Cortex-A9 based devices.

    Read here
  • A program that is running on a desktop.
  • Cortex-A Series Programmer's Guide for Armv7-A

    Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for Armv7-A.

    Get the guide
  • a ulink, a board, a desktop.
  • Development Tools for Cortex-A

    Arm and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.

    Development Tools

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-A9 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Related IP

The Cortex-A9 processor can be incorporated into an SoC using a broad range of Arm technology including Graphics IP, System IP, and Physical IP. The Cortex-A9 processor is fully supported by Arm development tools. Related IP includes:

 

Graphic IP
Other IP
Tools

Mali GPUs

Mali Display Processors

Mali-V500 Video Processor

CoreLink Network Interconnect Family

CoreLink System Controllers

Interrupt Controllers

CoreSight SoC-400

POP IP

DS-5 Development Studio

Fixed Virtual Platforms

Development Boards

Arm Compiler

Fast Models

 


Community Blogs

Community Forums

Suggested answer Why AXI4 changed the definition of AxCACHE?
  • AXI4
0 votes 85 views 1 replies Latest 23 hours ago by Colin Campbell Answer this
Suggested answer Whether Armv7-A has a Write Buffer 0 votes 160 views 7 replies Latest yesterday by vstehle Answer this
Suggested answer AXI read response in error case 0 votes 98 views 1 replies Latest yesterday by Colin Campbell Answer this
Answered dsb and dmb 0 votes 968 views 11 replies Latest 2 days ago by digital_kevin Answer this
Suggested answer DWT 0 votes 84 views 1 replies Latest 3 days ago by Joseph Yiu Answer this
Answered Armv7 Store Buffer 0 votes 266 views 6 replies Latest 3 days ago by Yang Wang Answer this
Suggested answer Why AXI4 changed the definition of AxCACHE? Latest 23 hours ago by Colin Campbell 1 replies 85 views
Suggested answer Whether Armv7-A has a Write Buffer Latest yesterday by vstehle 7 replies 160 views
Suggested answer AXI read response in error case Latest yesterday by Colin Campbell 1 replies 98 views
Answered dsb and dmb Latest 2 days ago by digital_kevin 11 replies 968 views
Suggested answer DWT Latest 3 days ago by Joseph Yiu 1 replies 84 views
Answered Armv7 Store Buffer Latest 3 days ago by Yang Wang 6 replies 266 views