Cortex-A9 Technical Reference Manual
For system designers and software engineers, the Cortex-A9 manual provides information on implementing and programming Cortex-A9 based devices.Technical Reference Manual
Cortex-A Series Programmer's Guide for ARMv7-A
Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for ARMv7-A.Get the Guide
Development Tools for Cortex-A
ARM and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.Development Tools
|Memory Management||ARMv7 Memory Management Unit (MMU)|
|Debug and Trace||CoreSight DK-A9 CoreSight SoC-400|
Partial Out-of-order 10+ stage pipeline
The Cortex-A9 processor is available in two variants: as a single core Cortex-A9 UP processor and as Cortex-A9 MP where it can scale up to four processor cores in a cluster.
Scalable and configurable ARMv7-A processor and cluster
Configurable L1 caches up to 64kB, optional NEON and Floating-point extensions, system coherency support using Accelerator Coherency Port (ACP).
Cortex-A9 SpecInt2k Performance Relative to Cortex-A8
The Cortex-A9 processor is a performance and power optimized multi-core processor. It features a dual-issue, partially out-of-order pipeline and a flexible system architecture with configurable caches and system coherency using ACP port. The Cortex-A9 processor achieves a better than 50% performance over the Cortex-A8 processor in a single-core configuration.