The exceptionally small silicon area, low power and minimal code footprint of the processor enables developers to achieve 32-bit performance at an 8-bit price point, bypassing the step to 16-bit devices.
The ultra-low gate count of the Cortex-M0 processor also enables its deployment in analog and mixed signal devices. Arm DesignStart provides the fastest, simplest, no-risk route to custom silicon success. Get free access to design and license the Cortex-M0 and free forum support to accelerate custom SoC development.
- Smallest footprint Arm processor with a total floorplan area of 0.007 mm2 in a 40nm technology process.
- Simple and quick development. With just 56 instructions, it is possible to quickly master the entire Cortex-M0 instruction set and its C-friendly architecture.
- A low-cost and simplified fast-track license option is available for the Cortex-M0 through the Arm DesignStart portal.
|ISA Support||Thumb/Thumb-2 subset|
||Bit banding region can be implemented with Cortex-M System Design Kit|
|Interrupts||Non-maskable Interrupt (NMI) + 1 to 32 physical interrupts|
||Hardware single-cycle (32x32) multiply option|
||Integrated WFI and WFE Instructions and Sleep On Exit capability
Sleep & Deep Sleep Signals
Optional Retention Mode with Arm Power Management Kit
||Optional JTAG and Serial Wire Debug ports. Up to 8 Breakpoints and 4 Watchpoints.|
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Machine Learning on Cortex-M
The Cortex-M0 processor brings 32-bit performance to even the simplest and most cost-sensitive devices.
Analogue mixed signal devices including MEMS sensors
Finite State Machines
Wearable Health Monitors
The Cortex-M0 processor can be incorporated into a SoC using a broad range of Arm technology including System IP, and Physical IP. It is fully supported by Arm development tools. Related IP includes:
Exceptional code density
On average, the mix between 16bit and 32bit instructions yields a better code density when compared to 8bit and 16bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory.
Binary upward compatible with all other Cortex-M processors
The Cortex-M0 has mainly 16bit Thumb-2 instructions and few 32bit ones. These instructions are also present on all the other Cortex-M processors. Hence all code written for the Cortex-M0 will run as is on the other processors.
Built-in low-power features
Sleep, deep sleep and state retention are three low power modes available to the user.
Optional Debug Access Port and Serial Wire Debug
For devices where every pin counts the serial wire debug port uses only two pins.
Performance Efficiency 2.33 CoreMarks/MHz* and 0.89/1.02/1.27 DMIPS**.
|Arm Cortex-M0 Implementation Data***|
(7-track, typical 1.8v, 25°C)
(7-track, typical 1.2v, 25°C)
(9-track, typical 1.1v, 25°C)
|Floor planned Area||
** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi- le”) compilation. All are with the original (K&R) v2.1 of Dhrystone
*** Configuration with full ISA support and Interrupt Controller, includes 1 IRQ + NMI, excludes ETM, MPU and debug
Cortex-M0 Technical Reference Manual
In-depth material for system designers, integrators and verification engineers. An important resource for software developers who want to make use of the Cortex-M0.Read here
White Paper: Cortex-M for beginners
This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.Read here
Embedded Development Tools for Cortex-M Series
Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.Learn more
Cortex-M System Design Kit (CMSDK)
CMSDK is a comprehensive system solution designed to work seamlessly with Cortex-M processors out-of-the-box.Learn more
Arm Design Reviews
Arm's on-site design review service gives licensees confidence that their Cortex-M0 CPU is implemented efficiently, to provide maximum system performance, with lowest risk and fastest time-to-market.Learn more
Questions? Request more information
Learn more about Cortex-M0, Arm’s smallest processor available. Contact us to speak with our technical team.Find out more