The Arm Cortex-M3 processor is the industry-leading 32-bit processor for highly deterministic real-time applications. 


The Cortex-M3 processor is specifically developed to enable partners to develop high-performance low-cost platforms for a broad range of devices including microcontrollers, automotive body systems, industrial control systems and wireless networking and sensors.

Arm DesignStart provides free access to design and license the Cortex-M3, and free forum support to accelerate custom SoC development. It is the fastest, simplest, no-risk route to custom silicon success.

Download this whitepaper for tips and tools to creating an SoC proof-of-concept, free and fast!

Fast access to Cortex-M3

Design and produce a custom SoC with the widely-deployed Cortex-M3 and Cortex-M0 processors, with no upfront license fee.

Block Diagram on Cortex-M3.

Key benefits

  • Design the most optimal System-On-Chip with a processor that has the perfect balance between area, performance and power with comprehensive system interfaces and integrated debug and trace components.

  • Develop solutions for a large variety of markets with a full-featured Armv7-M instruction set that has been proven across a broad set of embedded applications.

  • Capture a worldwide experienced developer base to accelerate adoption of new Cortex-M3 powered products and leverage the available extensive knowledge base to reduce support costs.

  • Achieve exceptional 32-bit performance with low dynamic power, delivering leading system energy efficiency due to integrated software controlled sleep modes, extensive clock gating and optional state retention. 


Architecture Armv7-M Harvard
ISA Support Thumb/Thumb-2
Pipeline 3-stage
Memory Protection
Optional 8 region MPU with sub regions and background region
Interrupts Non-maskable Interrupt (NMI) + 1 to 240 physical interrupts
Interrupt Priority Levels 8 to 256 priority levels
Wake-up Interrupt Controller
Up to 240 Wake-up Interrupts
Sleep Modes
Integrated WFI and WFE Instructions and Sleep On Exit capability.
Sleep & Deep Sleep Signals.
Optional Retention Mode with Arm Power Management Kit
Bit Manipulation Integrated Instructions & Bit Banding
Enhanced Instructions Hardware Divide (2-12 Cycles), Single-Cycle (32x32) Multiply, Saturated Math Support
Optional JTAG and Serial Wire Debug ports. Up to 8 Breakpoints and 4 Watchpoints.


Optional Instruction and Data Trace (ETM), Data Trace (DWT), and Instrumentation Trace (ITM)

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The Cortex-M3 has been specifically developed for partners to develop high-performance low-cost devices for a broad range of embedded market segments.




Motor Control



Smart home/building/

Key Features

Powerful debug and non-intrusive real-time trace

Comprehensive debug and trace features dramatically improve developer productivity. It is extremely efficient to develop embedded software with proper debug.

Memory Protection Unit (MPU)

Software reliability improves when each module is allowed access only to specific areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data.

Integrated nested vectored interrupt controller (NVIC)

There is no need for a standalone external interrupt controller. Interrupt handling is taken care of by the NVIC removing the complexity of managing interrupts manually via the processor.

Thumb-2 code density

On average, the mix between 16bit and 32bit instructions yields a better code density when compared to 8bit and 16bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory.


Performance Efficiency: 3.34 CoreMark/MHz*  and  1.25 / 1.50 / 1.89 DMIPS/MHz**

Arm Cortex-M3 Implementation Data***

(7-track, typical 1.8v, 25°C)
(7-track, typical 1.2v, 25°C)
(9-track, typical 1.1v, 25°C)
Dynamic Power 141 µW/MHz 31 µW/MHz 11 µW/MHz
Floorplanned Area 0.35 mm2 0.09 mm2 0.02 mm2

  * see:

  ** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi-file”) compilation. All are with the original (K&R) v2.1 of Dhrystone 

   *** Base usable configuration includes 1 IRQ + NMI, excludes ETM, MPU and debug


Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-M3 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses Arm Design Reviews

  • Manual containing technical information.
  • Cortex-M3 Technical Reference Manual

    For system designers, system integrators, verification engineers and software programmers who are building a Cortex-M3 based SoC.

    Read here
  • A program that is running on a desktop.
  • White Paper: Armv8-M Architecture

    This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.

    Read here
  • A guide on software optimization.
  • Cortex-M System Design Kit (CMSDK)

    CMSDK is a comprehensive system solution designed to work seamlessly with Cortex-M processors out-of-the-box.

    Learn more
  • a ulink, a board, a desktop.
  • Embedded Development Tools for Cortex-M Series

    Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.

    Learn more
  • Product due to be released to  market.
  • Arm Design Reviews

    Arm's on-site design review service gives licensees confidence that their Cortex-M3 CPU is implemented efficiently, to provide maximum system performance, with lowest risk and fastest time-to-market.

    Learn more
  • The top half of a human.
  • Questions? Request more information

    Learn more about Cortex-M3, Arm’s  industry-leading 32-bit processor for highly deterministic real-time applications. Contact us to speak with our technical team.

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