Cortex-M3

The Arm Cortex-M3 processor is the industry-leading 32-bit processor for highly deterministic real-time applications. 

Block Diagram on Cortex-M3.

Getting Started

The Cortex-M3 processor is specifically developed to enable partners to develop high-performance low-cost platforms for a broad range of devices including microcontrollers, automotive body systems, industrial control systems and wireless networking and sensors.

DesignStart helps companies design innovative custom chips or FPGA designs, with the lowest risk possible. You can access the Cortex-M3 via DesignStart for no upfront fee. 

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Specifications

Architecture Armv7-M Harvard
ISA Support Thumb/Thumb-2
Pipeline three-stage
Memory Protection
Optional 8 region MPU with sub regions and background region
Interrupts Non-maskable Interrupt (NMI) + 1 to 240 physical interrupts
Interrupt Priority Levels 8 to 256 priority levels
Wake-up Interrupt Controller
Up to 240 Wake-up Interrupts
Sleep Modes
Integrated WFI and WFE Instructions and Sleep On Exit capability.
Sleep & Deep Sleep Signals.
Optional Retention Mode with Arm Power Management Kit
Bit Manipulation Integrated Instructions & Bit Banding
Enhanced Instructions Hardware Divide (2-12 Cycles), Single-Cycle (32x32) Multiply, Saturated Math Support
Debug
Optional JTAG and Serial Wire Debug ports. Up to 8 Breakpoints and 4 Watchpoints.

Trace

Optional Instruction (ETM), Data Trace (DWT), and Instrumentation Trace (ITM)

Fast access to Cortex-M3

Access Cortex-M3 for $0 upfront for custom chips or FPGA designs with Arm DesignStart.

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Characteristics

Performance Efficiency: 3.34 CoreMark/MHz*  and  1.25 / 1.50 / 1.89 DMIPS/MHz**

Arm Cortex-M3 Implementation Data***

180ULL
(7-track, typical 1.8v, 25°C)
90LP
(7-track, typical 1.2v, 25°C)
40LP
(9-track, typical 1.1v, 25°C)
Dynamic Power 141 µW/MHz 31 µW/MHz 11 µW/MHz
Floorplanned Area 0.35 mm2 0.09 mm2 0.02 mm2

  * see: http://www.eembc.org/benchmark/reports/benchreport.php?benchmark_seq=1687&suite=CORE

  ** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi-file”) compilation. All are with the original (K&R) v2.1 of Dhrystone 

   *** Base usable configuration includes 1 IRQ + NMI, excludes ETM, MPU and debug


  • Manual containing technical information.
  • Cortex-M3 Technical Reference Manual

    For system designers, system integrators, verification engineers and software programmers who are building a Cortex-M3 based SoC.

    Read here
  • A program that is running on a desktop.
  • White Paper: Armv8-M Architecture

    This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.

    Read here
  • A guide on software optimization.
  • Cortex-M System Design Kit (CMSDK)

    CMSDK is a comprehensive system solution designed to work seamlessly with Cortex-M processors out-of-the-box.

    Learn more
  • a ulink, a board, a desktop.
  • Embedded Development Tools for Cortex-M Series

    Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.

    Learn more

Get support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-M3 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Related IP

The Cortex-M3 processor is usually incorporated into a SoC using a broad range of Arm technology including System IP and Physical IP. It is fully supported by Arm development tools. Related IP includes:

Compatible IP
Tools
Software

Cortex-M System Design Kit

Socrates System Builder

AMBA System Controllers

DS-5 Development Studio

Arm Keil MDK software development tool

Cortex-M Prototyping System

Cortex Microcontroller Software Interface Standard

Arm Mbed Pelion Device Platform

Software Test Libraries

Community Blogs

Community Forums

Suggested answer 'xilinx.com:ip:axi_bram_ctrl:4.0' does not support the current part 'xc7a35ticsg324-1L'
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Answered Looking for an eval board with octa core Armv8 CPU
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Suggested answer setting brakpoint from code 0 votes 71 views 2 replies Latest 16 hours ago by Joseph Yiu Answer this
Answered aarch64 Exception Level Sw itch from EL1 to EL0 0 votes 136 views 7 replies Latest yesterday by michaelyuanfeng Answer this
Not answered reference source code to verify the Cortex-R52
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Answered Exclusive Access Restriction Clarification
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Suggested answer 'xilinx.com:ip:axi_bram_ctrl:4.0' does not support the current part 'xc7a35ticsg324-1L' Latest 11 hours ago by BBtheEE 3 replies 578 views
Answered Looking for an eval board with octa core Armv8 CPU Latest 13 hours ago by Dzik 9 replies 340 views
Suggested answer setting brakpoint from code Latest 16 hours ago by Joseph Yiu 2 replies 71 views
Answered aarch64 Exception Level Sw itch from EL1 to EL0 Latest yesterday by michaelyuanfeng 7 replies 136 views
Not answered reference source code to verify the Cortex-R52 Started yesterday by Jorney 0 replies 37 views
Answered Exclusive Access Restriction Clarification Latest yesterday by Taniya Garg 4 replies 1497 views