The Cortex-M4 processor is developed to address digital signal control markets that demand an efficient, easy-to-use blend of control and signal processing capabilities. The combination of high-efficiency signal processing functionality with the low-power, low cost and ease-of-use benefits of the Cortex-M family of processors is designed to satisfy the emerging category of flexible solutions specifically targeting the motor control, automotive, power management, embedded audio and industrial automation markets.
- Gain the advantages of a microcontroller with integrated DSP, SIMD, and MAC instructions that simplify overall system design, software development and debug.
- Accelerate single precision floating-point operations up to ten times over the equivalent integer software library with the optional Floating-Point Unit (FPU).
- Develop solutions for a large variety of markets with a full-featured Armv7-M instruction set that has been proven across a broad set of embedded applications.
- Achieve exceptional 32-bit performance with low dynamic power, delivering leading system energy efficiency due to integrated software controlled sleep modes, extensive clock gating and optional state retention.
|Architecture|| Armv7E-M Harvard
|Pipeline||3-stage + branch speculation|
||Single cycle 16/32-bit MAC
Single cycle dual 16-bit MAC
8/16-bit SIMD arithmetic
Hardware Divide (2-12 Cycles)
||Optional single precision floating point unit
IEEE 754 compliant
||Optional 8 region MPU with sub regions and background region
|Interrupts||Non-maskable Interrupt (NMI+ 1 to 240 physical interrupts|
|Interrupt Priority Levels||8 to 256 priority levels|
|Wake-up Interrupt Controller
||Up to 240 Wake-up Interrupts
||Integrated WFI and WFE Instructions and Sleep On Exit capability.
Sleep & Deep Sleep Signals.
Optional Retention Mode with Arm Power Management Kit
||Integrated Instructions & Bit Banding|
||Optional JTAG and Serial Wire Debug ports. Up to 8 Breakpoints and 4 Watchpoints.|
|Optional Instruction Trace (ETM), Data Trace (DWT), and Instrumentation Trace (ITM).|
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The Cortex-M4 has been specifically developed for partners to design high-performance low-cost devices for a broad range of digital signal control embedded market segments.
Sensor fusion and wearables
Signal processing such as power and motor control
SIMD, saturating arithmetic, fast MAC
Powerful instruction set for accelerating DSP applications, built right into the processor. A highly optimised DSP library built using these instructions is available free-of-charge from the Arm website.
Powerful debug and non-obtrusive real-time trace
Comprehensive debug and trace features dramatically improve developer productivity. It is extremely efficient to develop embedded software with proper debug.
Memory Protection Unit (MPU)
Software reliability improves when each module is allowed access only to specific areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data.
Integrated nested vectored interrupt controller (NVIC)
There is no need for a standalone external interrupt controller. Interrupt handling is taken care of by the NVIC removing the complexity of managing interrupts manually via the processor.
Thumb-2 code density
On average, the mix between 16bit and 32bit instructions yields better code density when compared to 8bit and 16bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory.
Performance Efficiency: 3.40 CoreMark/MHz* and without FPU: 1.25 / 1.52 / 1.91 DMIPS/MHz**, With FPU: 1.27 / 1.55 / 1.95 DMIPS/MHz**
|Arm Cortex-M4 Implementation Data***|
(7-track, typical 1.8v, 25C)
(7-track, typical 1.2v, 25C)
(9-track, typical 1.1v, 85C)
|Dynamic Power||151 µW/MHz||32.82 µW/MHz||12.26 µW/MHz|
|Floor planned Area||0.44 mm2||0.119 mm2||0.028 mm2|
** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi-file”) compilation. All are with the original (K&R) v2.1 of Dhrystone .
*** Base usable configuration includes DSP extensions, 1 IRQ + NMI, excludes ETM, MPU, FPU and debug.
The Cortex-M4 processor is usually incorporated into a SoC using a broad range of Arm technology including System IP and Physical IP. It is fully supported by Arm development tools. Related IP includes:
Cortex-M4 Technical Reference Manual
For system designers, integrators and testers, the Technical Reference Manual (TRM) provides details of the Cortex-M4 processor.Technical Reference Manual
White Paper: Cortex-M for beginners
This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.Get the White Paper
Cortex-M System Design Kit (CMSDK)
CMSDK is a comprehensive system solution designed to work seamlessly with Cortex-M processors out-of-the-box.Learn more about CMSDK
Embedded Development Tools for Cortex-M Series
Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.Software Tools for Cortex-M
Arm Design Reviews
Arm's on-site design review service gives licensees confidence that their Cortex-M4 CPU is implemented efficiently, to provide maximum system performance, with lowest risk and fastest time-to-market.Explore Arm Design Reviews
Questions? Request more information
Learn more about Cortex-M4, Arm’s high performance embedded processor. Contact us to speak with our technical team.Find out more