Cortex-M7

The Arm Cortex-M7 processor is the highest performance member of the energy-efficient Cortex-M processor family.

Block Diagram on Cortex-7.

Getting Started

The Cortex-M7 enables partners to build the most sophisticated variety of MCUs and embedded SoCs. It has been designed to deliver a very high level of performance, while maintaining the excellent responsiveness and ease-of-use of the Armv7-M architecture. Its industry leading high-performance and flexible system interfaces are ideal for a wide variety of application areas including automotive, industrial automation, medical devices, high-end audio, image and voice processing, sensor fusion, advanced motor control and in the deployment of the Internet of Things (IoT).


Specifications

Architecture Harvard
ISA Support Armv7-M
Pipeline 6-stage superscalar + branch prediction
DSP Extensions
Single cycle 16/32-bit MAC
Single cycle dual 16-bit MAC
8/16-bit SIMD arithmetic
Hardware Divide (2-12 Cycles)
Floating-Point Unit
Optional single and double precision floating point unit
IEEE 754 compliant
Interconnect
64-bit AMBA4 AXI, AHB peripheral port
Instruction cache
0 to 64 kB, 2-way associative with optional ECC
Data cache
0 to 64 kB, 4-way associative with optional ECC
Instruction TCM
0 to 16 MB with optional ECC
Data TCM
0 to 16 MB with optional ECC
Memory Protection
Optional 8 or 16 region MPU with sub regions and background region
Interrupts Non-maskable Interrupt (NMI) + 1 to 240 physical interrupts
Interrupt Priority Levels
8 to 256 priority levels
Wake-up Interrupt Controller
Up to 240 Wake-up Interrupts
Sleep Modes
Integrated WFI and WFE Instructions and Sleep On Exit capability.
Sleep & Deep Sleep Signals.
Optional Retention Mode with Arm Power Management Kit
Debug
Integrated Instructions
Debug
Optional JTAG and Serial Wire Debug ports. Up to 8 Breakpoints and 4 Watchpoints.

Trace

Optional Instruction Trace (ETM), Micro Trace Buffer (MTB), Data Trace (DWT), and Instrumentation Trace (ITM)

Characteristics

Performance Efficiency: 5 CoreMark/MHz* and 2.14 / 2.55 / 3.23 DMIPS/MHz**

Arm Cortex-M7 implementation data*** 
  28 HPM
(9-track, typical 0.9v, 85°C)
Dynamic Power
 33 µW/MHz
Floorplan Area
 0.067mm2

* CoreMark 1.0 : IAR Embedded Workbench v7.30.1 --endian=little --cpu=Cortex-M7 -e -Ohs --use_c++_inline --no_size_constraints / Code in TCM - Data in TCM.

** The first result abides by all of the “ground rules” laid out in the Dhrystone documentation, the second permits inlining of functions, not just the permitted C string libraries, while the third additionally permits simultaneous (”multi-file”) compilation. All are with the original (K&R) v2.1 of Dhrystone.

*** Base usable configuration includes 1 IRQ + NMI, excludes ETM, MPU, FPU and debug.

 


  • Manual containing technical information.
  • Cortex-M7 Technical Reference Manual

    The complete reference manual for system development, verification and programming on Cortex-M7 based SoCs.

    Download
  • A program that is running on a desktop.
  • White Paper: Cortex-M for beginners

    This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.

    Read here
  • A guide on software optimization.
  • Embedded Development Tools for Cortex-M Series

    Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.

    Learn more

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-M7 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Related IP

The Cortex-M7 processor is usually incorporated into a SoC using a broad range of Arm technology including System IP and Physical IP. It is fully supported by Arm development tools. Related IP includes:

 

Compatible IP
Tools
Software

Cortex-M System Design Kit

Socrates System Builder

AMBA System Controllers

DS-5 Development Studio

Arm Keil MDK software development tool

Arm Cortex-M7 Software Development Support

Cortex-M Prototyping System

Cortex Microcontroller Software Interface Standard

Arm Mbed Pelion Device Management

 

Community Blogs

Community Forums

Not answered M0 Synthesis Power Report
  • Cortex-M0
  • DesignStart
0 votes 24 views 0 replies Started 11 hours ago by Nacho Renteria Answer this
Suggested answer M0+ Stack Pointer (PSP/MSP) Clarification
  • Cortex-M0
  • R13 (SP Stack Pointer)
  • cortex-m0+
0 votes 300 views 9 replies Latest 17 hours ago by Sean Dunlevy Answer this
Not answered Removal of WID's in AMBA AXI4 0 votes 38 views 0 replies Started yesterday by mvenkatesh Answer this
Not answered Arm keil4 optimization 0 votes 43 views 0 replies Started yesterday by Wenchuan2018 Answer this
Not answered Hi folks, anyone got any idea on which compiler to use in Qemu for working with 64bit Arm Architecture? Complete noob here 0 votes 47 views 0 replies Started 3 days ago by Kallooran Answer this
Not answered Is the model debugger for fast model free?
  • Fast Models
  • Fixed Virtual Platforms (FVPs)
0 votes 58 views 0 replies Started 3 days ago by sukey Answer this
Not answered M0 Synthesis Power Report Started 11 hours ago by Nacho Renteria 0 replies 24 views
Suggested answer M0+ Stack Pointer (PSP/MSP) Clarification Latest 17 hours ago by Sean Dunlevy 9 replies 300 views
Not answered Removal of WID's in AMBA AXI4 Started yesterday by mvenkatesh 0 replies 38 views
Not answered Arm keil4 optimization Started yesterday by Wenchuan2018 0 replies 43 views
Not answered Hi folks, anyone got any idea on which compiler to use in Qemu for working with 64bit Arm Architecture? Complete noob here Started 3 days ago by Kallooran 0 replies 47 views
Not answered Is the model debugger for fast model free? Started 3 days ago by sukey 0 replies 58 views