Analyzing SVE code with Arm Instruction Emulator and Arm Code Advisor

The Arm Instruction Emulator is an emulator that runs on AArch64 platforms and emulates Scalable Vector Extension (SVE) instructions. Arm Code Advisor can integrate with Arm Instruction Emulator, allowing you to develop, analyze, and optimize code even if you don't have access to hardware that implements the Scalable Vector Extension (SVE) for the Armv8-A architecture.

This tutorial uses LULESH 2.0 to demonstrate how to compile SVE code, run it using Arm Instruction Emulator, and collect analysis data from the emulator using Arm Code Advisor.

Load the Arm HPC tools

Ensure the Arm tools are available by loading the environment modules for Arm Compiler for HPC and Arm Code Advisor, for example:

module load Generic-AArch64/SUSE/12/suites/arm-compiler-for-hpc/1.3
module load Generic-AArch64/SUSE/12/suites/arm-code-advisor-beta/1.0

To see which environment modules are available, use module avail.

Note: See Installing Arm Compiler for HPC and Installing Arm Code Advisor for more information about installing the Arm tools and configuring environment modules.

Download LULESH

Livermore Unstructured Lagrangian Explicit Shock Hydrodynamics (LULESH) is a hydrodynamics modeling application. This tutorial uses LULESH 2.0 as an example application to demonstrate Arm Code Advisor.

To obtain LULESH 2.0:

  1. Download the latest release version of LULESH 2.0 CPU Models from https://codesign.llnl.gov/lulesh.php.

    At the time of writing, the latest version is 2.0.3:

    wget https://codesign.llnl.gov/lulesh/lulesh2.0.3.tgz
  2. Uncompress and extract the downloaded package:

    tar -xvf lulesh2.0.3.tgz

Build LULESH using Arm C/C++ Compiler for HPC

By default, the LULESH build configuration compiles using g++. We'll change this to use Arm C/C++ Compiler for HPC and generate insights by making the following changes in the Makefile:

  1. Change:

    SERCXX = g++ -DUSE_MPI=0

    to:

    SERCXX = armclang++ -DUSE_MPI=0
  2. Change:

    CXX = $(MPICXX)

    to:

    CXX = $(SERCXX)
  3. Change:

    CXXFLAGS = -g -O3 -fopenmp -I. -Wall

    to:

    CXXFLAGS = -g -O3 -fopenmp -I. -Wall -march=armv8-a+sve -insight

To build the LULESH application:

make

The build produces an executable binary, lulesh2.0 in the current directory.

Gathering profiling data with Arm Instruction Emulator

The application has been built for the Armv8-A architecture with Scalable Vector Extension. If we were to try and run this binary on a platform that does not implement the SVE extension, we would see an Illegal instruction error, because our application makes use of SVE instructions.

Arm Instruction Emulator is an emulator that can execute AArch64 and Scalable Vector Extension (SVE) instructions. The --armie option instructs Arm Code Advisor to use the emulator to collect profiling data rather than running the executable directly:

 armcadvisor collect --armie -- ./lulesh2.0 -s 15

Arm Code Advisor runs the specified executable using Arm Instruction Emulator, and collects performance profiling data about the code.

The SVE architecture extension specifies an implementation-defined vector length. The -msve-vector-bits option lets you specify the vector length used by Arm Instruction Emulator:

 armcadvisor collect --armie -msve-vector-bits=256 -- ./lulesh2.0 -s 15

Analyze insights and performance data

Analysis brings together the insights generated by the compiler and the performance data collected by Arm Code Advisor to produce prioritized advice, ranking insights in order of importance.

To perform analysis:

% armcadvisor analyze
Generating analysis file, armcadvisor.advice

View advice in the Arm Code Advisor web interface

As in the Getting started with Arm Code Advisor tutorial, use the armcadvisor web command to display the Arm Code Advisor web interface:

% armcadvisor web -ne
Open your browser to one of:
  http://server.arm.com:8080
  http://127.0.0.1:8080

Advice in the source code shows where loops have been vectorized with SVE instructions to optimize performance: