Corstone foundation IP diagram.

Corstone-100 Foundation IP Overview

Getting started

The Arm Corstone-100 foundation IP offers:

  • A starting point for a system using Arm Cortex-M0/M0+/M3/M4 processors
  • A toolkit to build secure embedded systems
  • Subsystem and configurable system IP

The Corstone-100 foundation IP is the essential toolkit for your next Arm Cortex-M based design and helps you build your system quickly and reliably. It also gives you all the flexibility to design your desired architecture.


The Corstone-100 foundation IP is superseded by Corstone-101 foundation IP, which contains an additional Flash Controller IP to ease designing your SoC for IoT and automotive applications.

DesignStart

The Corstone-100 foundation IP is included in Arm DesignStart as part of a comprehensive, simplified solution for custom SoC development.







Corstone-100 Foundation IP Technical Overview

Download Technical Overview documentation

*Note that the Corstone-100 foundation IP was formerly named SDK-100

Want to know about Corstone-101?

Corstone-101 foundation IP is superseding Corstone-100 foundation IP.






Key elements of Corstone-100 Foundation IP:

The elements of the Corstone-100 foundation IP are:

  • SSE-050 Subsystem – An efficient and expandable subsystem based on Cortex-M3
  • CMSDK – Which includes a multi-layer AHB generator to connect everything in your system in a reliable and efficient way, bridges, adaptors and controllers. It even features a few system examples to inspire your future design.
  • AHB Flash Cache – To get the most of Flash-based systems (either with embedded Flash or external Flash), an efficient cache system is necessary. Within a compact area, this block significantly improves performance and power consumption of your SoC.
  • RTC – A real-time clock for applications that need to maintain a time base, which is likely to be the case for all embedded applications!
  • TRNG – Security cannot be a second thought! The True Random Number Generator is the minimum element that you have to integrate in a device to ensure a strong security foundation.

Don’t look further or spend your time reinventing the wheel! Get the Corstone-100 with your Cortex-M processor, and you will save time, risk and effort.


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Answered Where do I find presentations and photos from SC'18? Started 2 months ago by John Linford 0 replies 437 views
Discussion Please consider my tag for inclusion on the ARM Community Latest 1 months ago by SULMIYATDAD 25 replies 16606 views
Suggested answer M0+ Stack Pointer (PSP/MSP) Clarification Latest 8 hours ago by Sean Dunlevy 14 replies 540 views
Not answered Any Method to trigger/start FreeRTOS task from normal STM32 ISR?? Started 12 hours ago by madhan 0 replies 16 views
Suggested answer When should APB slave Sample address/Data for read/write transaction from APB master? Latest 13 hours ago by arm_user 2 replies 80 views
Suggested answer When Wrapping happens in AXI? Latest 15 hours ago by Colin Campbell 1 replies 55 views