ARM Cycle Models for ARM DesignStart

Cycle Models are fastest route to evaluate ARM Cortex-M3 processors with DesignStart. They are cycle accurate models derived from RTL and used for IP evaluation, system architecture design, and software performance optimization. Cycle Models traditionally perform much faster than RTL in a simulator (2x-5x in most cases) and emit trace data to facilitate hardware and software debug. 

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Why use Cycle Models for DesignStart

Cycle Models for DesignStart are an abridged version of the standard Cycle Model product, which are suitable for design analysis in an RTL simulation environment. Instant, free access to the ARM Cortex-M3 DesignStart Cycle Models provide a fast, functional and cycle accurate platform for confidently making architectural decisions, optimizing performance, and developing bare metal software. 

Full Tarmac trace

The Cortex-M3 DesignStart Cycle Model also supports Tarmac trace which contains all instructions executed, and register and memory transactions. Tarmac and top-level waveform data provide 100% accurate timing information, enabling extra visibility into the state of the system.

Compare simulation options

Feature

Full Cortex-M3
Cycle Model

Cortex-M3 Cycle Model
for DesignStart

Obfuscated
Cortex-M3 RTL

Cycle accurate model of Cortex-M3

 Yes

 Yes

 N/A

Tarmac trace

 Yes

 Yes 

 

Can be used inside RTL simulator

 Yes

 Yes

 Yes

Can be used within a modelling environment outside an RTL simulator

 Yes

 

 N/A

Reconfigurable via online portal

 Yes

   
Instrumentation for debug and performance analysis

 Yes

   
Performance analysis kits (CPAKs)

 Yes

   
Time Limit

               Indefinite

                          1 year*

                 Indefinite

*Cycle Models for DesignStart come with a 1 year free-of-charge license which can be converted to a full Cycle Model license at any point.