Why CoreLink SSE-100?
For the Internet of Things (IoT), one size does not fit all. IoT is about diverse applications, nodes, and sensors, which lead to diversity in end-node requirements and price points. IoT means billions of connected devices, some of these devices will be addressed by off-the-shelf designs while other applications will require customized SoCs and precise sensor integration.
The Arm subsystem supports IoT market growth by reducing development risk and enabling companies to quickly create products.
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About CoreLink SSE-100
The Arm subsystem supports IoT market growth by reducing development risk and enabling companies to quickly create products. The CoreLink SSE-100 subsystem includes open-source software libraries, integrated with the Arm mbed OS. Arm provides a complete IoT reference system that reduces the complexity and risk of an SoC design. The CoreLink SSE-100 subsystem features a range of peripherals and interfaces, including a Flash Controller for TSMC’s embedded Flash memory. It is specifically designed for use with Arm Cortex-M processors and Arm Cordio Bluetooth radio IP. It is possible to integrate other radios and wireless networking standards such as Wi-Fi and 802.15.4. The system design enhances two key features for IoT solutions: optimized power consumption and improved levels of security, with seamless mbed OS integration.
This AHB-lite multilayer crossbar interconnect links the system's main components. It features expansion ports to plug external master or slave components.
The integrated APB bridge also enables rapid connection of additional peripherals.
This controller attaches a configurable amount of SRAM to the system. It supports several instances of SRAM to precisely tune which ones can be powered-down or placed in retention mode.
This takes care of reducing the power consumption of the system to make sure that IoT devices built with this subsystem draw less current.
CoreLink SSE-100 subsystem example diagram
The CoreLink SSE-100 subsystem contains the foundation IP necessary in most IoT endpoints. Pre-validated using the same methodology and processes that are used to ensure the quality of Arm IP, it reduces the design risk and accelerates SoC development projects for IoT nodes.
The CoreLink SSE-100 subsystem connects to a Cortex-M3 processor. The Cortex-M3 is used in many current IoT devices, and is a good choice to run complex software stacks like mbed OS.
Software development is a very large part of the design time. The IoT subsystem has been developed in sync with mbed OS, and all hardware drivers are already available when you download the software stack.
This makes an SoC based on the IoT subsystem very attractive to software developers, who can start creating applications and use all the features of mbed OS right away.
Cordio Bluetooth LE Radio
The CoreLink SSE-100 subsystem is ready to connect to Arm Cordio radio, and integration of the Bluetooth software stack with mbed OS is already done. Unplug and play!
mbed OS brings in a range of features that allow developers to ensure that their product is secure.
You can also opt for a strong HW-based security environment, with the lowest possible attack surface, encryption acceleration, and true random number generation (TRNG).
In order to meet the stringent power requirements of IoT endpoints, it is necessary to use low-power libraries and SRAMs with different power modes, including support for retaining data across multiple modes.
Flash Cache performance
As Flash read accesses are slow and power hungry, the Flash Cache of the IoT subsystem is a key feature to reduce the overall power consumption and increase performance of the system.
Its size has been determined by a study of system performance to reduce the number of Flash read accesses as much as possible. A further reduction is achieved by using a wide 128 bit data bus at the Flash Controller level.
The Cortex-M System Design Kit is essential to many systems, including the IoT subsystem. In addition to a configurable interconnect, it consists of many bridges and interfaces.
Low power consumption
Thanks to its built-in Flash Controller, the CoreLink SSE-100 subsystem can connect to an embedded Flash and lead to single-chip designs that consume less energy than multi-chip solutions.
Additionally, the CoreLink SSE-100 subsystem includes an integrated cache which allows up to 99% flash power consumption reduction, by reducing the number of Flash fetches.
CoreLink SSE-100 subsystem technical reference manual
For system designers, system integrators and programmers who are designing an SoC, the Technical Reference Manual is the go-to resource.CoreLink SSE-100 subsystem TRM
3 engineers and 3 months to tape-out!
At ARM TechCon 2015, Arm demonstrated the Beetle test chip. Using the CoreLink SSE-100 subsystem, this test chip was assembled and taped-out in 3 months by a dedicated team of 3 engineers. First time success!EETimes article
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