CoreLink SSE-100 subsystem overview

Instead of building your SoC for IoT endpoints from scratch, the CoreLink SSE-100 subsystem allows designers to start from a pre-assembled foundation. With embedded Flash, processing, memory and Bluetooth radio pre-integrated and validated together, it enables fast design of single-chip solutions for IoT.

  • IoT Subsystem TRM
  • CoreLink SSE-100 subsystem technical reference manual

    For system designers, system integrators and programmers who are designing an SoC, the Technical Reference Manual is the go-to resource

    CoreLink SSE-100 subsystem TRM
  • Beetle test chip, built from the IoT subsystem, on its development board
  • 3 engineers and 3 months to tape-out!

    At ARM TechCon 2015, ARM demonstrated the Beetle test chip. Using the CoreLink SSE-100 subsystem, this test chip was assembled and taped-out in 3 months by a dedicated team of 3 engineers. First time success!

    EETimes article

CoreLink SSE-100 subsystem example diagram

The CoreLink SSE-100 subsystem contains the foundation IP necessary in most IoT endpoints. Pre-validated using the same methodology and processes that are used to ensure the quality of ARM IP, it reduces the design risk and accelerates SoC development projects for IoT nodes.

 

Key features

Interconnect

This AHB-lite multilayer crossbar interconnect links the system's main components. It features expansion ports to plug external master or slave components.

The integrated APB bridge also enables rapid connection of additional peripherals.

SRAM Controller

This controller attaches a configurable amount of SRAM to the system. It supports several instances of SRAM to precisely tune which ones can be powered-down or placed in retention mode.

Flash Cache

With embedded Flash on chip, it is necessary to include caching in the system to minimize power consumption. The Flash cache allows a reduction of up to 99% of the number of Flash accesses.

Power Management

This takes care of reducing the power consumption of the system to make sure that IoT devices built with this subsystem draw less current.

Cortex-M3 processor

The CoreLink SSE-100 subsystem connects to a Cortex-M3 processor. The Cortex-M3 is used in many current IoT devices, and is a good choice to run complex software stacks like mbed OS.

Learn more about the Cortex-M3

Cordio Bluetooth LE Radio

The CoreLink SSE-100 subsystem is ready to connect to ARM Cordio radio, and integration of the Bluetooth software stack with mbed OS is already done. Unplug and play!

Learn more about Cordio Bluetooth LE radio

Artisan Libraries

In order to meet the stringent power requirements of IoT endpoints, it is necessary to use low-power libraries and SRAMs with different power modes, including support for retaining data across multiple modes.

Learn more about ARM libraries

CMSDK

The Cortex-M System Design Kit is essential to many systems, including the IoT subsystem. In addition to a configurable interconnect, it consists of many bridges and interfaces.

Learn more about the CMSDK

mbed OS

Software development is a very large part of the design time. The IoT subsystem has been developed in sync with mbed OS, and all hardware drivers are already available when you download the software stack.

This makes an SoC based on the IoT subsystem very attractive to software developers, who can start creating applications and use all the features of mbed OS right away.

Learn more about mbed OS

Security

mbed OS brings in a range of features that allow developers to ensure that their product is secure.

You can also opt for a strong HW-based security environment, with the lowest possible attack surface, encryption acceleration, and true random number generation (TRNG).

Flash Cache performance

As Flash read accesses are slow and power hungry, the Flash Cache of the IoT subsystem is a key feature to reduce the overall power consumption and increase performance of the system.

Its size has been determined by a study of system performance to reduce the number of Flash read accesses as much as possible. A further reduction is achieved by using a wide 128 bit data bus at the Flash Controller level.

IoT subsystem Flash Cache performance