Arm CoreSight ELA-600 Embedded Logic Analyzer

CoreSight-ELA 600 Chip.

About CoreSight ELA-600 

The CoreSight ELA-600 Embedded Logic Analyzer inherits the debug capability and signal observability features of CoreSight ELA-500 with further optimization to improve data tracing efficiency and capacity. With CoreSight ELA-600, trigger condition can be set to initiate data tracing or output actions.
You also have the option of either storing trace data within CoreSight ELA-600 embedded SRAM in the same manner as CoreSight ELA-500 or aggregating them onto a larger memory area in the system/external to the SoC. 


  • Improve low-level signal observability and controllability in post-silicon debug.
  • Shorten debug cycle by speeding up error root-cause analysis.
  • Improve system efficiency with run-time signal monitoring and control.


Application Icons

Request more information

Want more information on CoreSight ELA-600?


CoreSight ELA-600 allows you to identify hard-to-diagnose bugs quickly. This accelerates silicon bring-up.

ELA-600 schematic diagram showing 12 input group signals and main ELA-600 functions

CoreSight ELA-500 and ELA-600 Comparison

CoreSight ELA-600 gives you additional enhancements that extend existing debug and trace use cases.




Trigger states



Embedded RAM config

Data compression

ATB interface

Simultaneous trace of 2 SIGNALGRPs on same clock cycle

Trigger state counters tracing

32-bit segmented trigger state comparators

Key features

  • SRAM configuration supports a 256-bit comparator
  • ATB configuration supports predicted delta based on repeated data and zero-byte removal
  • Selected byte control to further compress trace data
  • Each trigger state comparator can be segmented into multiple 32-bit comparators to allow greater comparison capabilities for logic analysis and tracing capability
  • Supports qualifier signals for each SIGNALGRP for signals that can be used to qualify valid data without needing to be traced.
  • Trace of trigger state counters for events measurement or performance measurement such as latency.
  • Simultaneous trace of two SIGNALGRPs on the same clock cycle.
  • Logic Analyzer Kit (LAK-500A and LAK-500I) included as part of ELA-600.


  • Manual containing technical information.
  • Technical Reference Manual

    For system designers, systems integrators, and programmers who are designing a SoC, the Technical Reference Manual is the go-to resource.

    Read here