TRACE32 is a software tool that can assist you with real-time debugging of your Arm based system.

TRACE32 can debug any Cortex-based designs and uses Arm CoreSight to help with real-time debugging. TRACE32 is compiler and operating system agnostic, allowing the best fit component, assured of compatibility. Arm works closely with Lauterbach to help developers easily debug their applications.

Security

With Arm TrustZone and TRACE32, you can access and debug hypervisors, operating systems, middleware, device drivers and your applications in both Secure and Non-secure worlds. Any part of the system can be viewed from anywhere.

Read guide

Trace

Arm processors can generate trace data, which is a fundamental feature to reduce the debug time. TRACE32 provides tools for both parallel and serial real-time trace for Arm. The trace tools can be used with Secure and Non-secure worlds and hypervisor-based systems, allowing for extremely detailed analysis of running code, the production of profiling and code coverage reports to accredited industry standards.

Learn more

Code coverage

TRACE32 can derive code coverage directly from the Arm-ETM program trace. It is possible to analyze the coverage data with various level of details, like asm, in line, function, file, and program. Code coverage data can also be exported as XML to assist with gaining relevant functional safety certifications.

Read guide

TRACE32 resources


Community Forums

Suggested answer Debug from reset vector 0 votes 40 views 4 replies Latest 5 hours ago by Ranjith Answer this
Not answered In APB, Why do we use enable signal? (Don't care about PREADY) 0 votes 24 views 0 replies Started 12 hours ago by INNS Answer this
Not answered DesignStart Eval : The number of INTISR in Cortex-M3 0 votes 20 views 0 replies Started 12 hours ago by tomaru Answer this
Answered cortex m7 STR fail 0 votes 101 views 4 replies Latest 13 hours ago by OldFoggy Answer this
Suggested answer Debug from reset vector Latest 5 hours ago by Ranjith 4 replies 40 views
Not answered In APB, Why do we use enable signal? (Don't care about PREADY) Started 12 hours ago by INNS 0 replies 24 views
Not answered DesignStart Eval : The number of INTISR in Cortex-M3 Started 12 hours ago by tomaru 0 replies 20 views
Answered cortex m7 STR fail Latest 13 hours ago by OldFoggy 4 replies 101 views