Voice recognition on Cortex-M

Keyword spotting on Cortex-M

Achieve high-accuracy keyword spotting on Cortex-M processors.

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Build a voice assistant with Google TensorFlow Lite

Perform ML inference on a Cortex-M7 based STM32F7 discovery board, using TensorFlow Lite for Microcontrollers.

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Micro speech with TensorFlow

Use TensorFlow Lite for Microcontrollers to run a neural network model to recognize keywords in speech.

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AI on Adafruit EdgeBadge

Learn to do speech recognition using TensorFlow models with the Adafruit EdgeBadge.

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Build noise-immune speech interfaces

See how BabbleLabs has taken its deep learning speech technology to build a new configuration and runtime software solution for optimized speech interfaces.

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Build an audio recognition system with Edge Impulse

Learn how to collect audio data from microphones, use signal processing to extract information, train a deep neural network and deploy the system to an embedded device – using an Arm Cortex-M4 based board and Edge Impulse.

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Voice recognition on Cortex-A

Rhasspy voice assistant on MATRIX

Use the MATRIX Creator to enable voice recognition with the Rhasspy offline voice assistant and a Docker image.

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Google AI Cloud and Raspberry Pi dog mood detector

Use Google AI Cloud to create a model to categorize dog sounds, then run the model on an Arm-based Raspberry Pi to listen for dog sounds and identify them.

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Build embedded voice-based devices with Picovoice

Use the Picovoice platform to build voice interfaces on a Raspberry Pi and a Cortex-M4 based device.

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Deploy cloud-based ML for speech transcription

Set up client-server speech transcription running on cloud-hosted Arm servers.

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Not answered Arm Musca A1 - SRAM0 MPC Security attribute during boot
  • Musca-A
  • TrustZone for Armv8-M
  • CoreLink SSE-200
0 votes 40 views 0 replies Started 13 hours ago by Daniel Oliveira Answer this
Suggested answer Cortex A-35 prevent fetch code allocation in cache 0 votes 201 views 2 replies Latest 14 hours ago by Etienne Alepins Answer this
Suggested answer Is it possible to move up from EL0 AARCH32 to EL1 AARCH64 0 votes 283 views 1 replies Latest 15 hours ago by vstehle Answer this
Suggested answer How can I declare variable in secure world memory(Trustzone-m)
  • TrustZone for Armv8-M
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0 votes 265 views 3 replies Latest 16 hours ago by Oliver Beirne Answer this
Not answered Arm Musca A1 - SRAM0 MPC Security attribute during boot Started 13 hours ago by Daniel Oliveira 0 replies 40 views
Suggested answer Cortex A-35 prevent fetch code allocation in cache Latest 14 hours ago by Etienne Alepins 2 replies 201 views
Suggested answer Is it possible to move up from EL0 AARCH32 to EL1 AARCH64 Latest 15 hours ago by vstehle 1 replies 283 views
Suggested answer How can I declare variable in secure world memory(Trustzone-m) Latest 16 hours ago by Oliver Beirne 3 replies 265 views