Arm Cortex-A72/A53 MPCore Hardware Design

  • Delivery method: Face-to-face (Private)

  • Location: Any location

  • Course Length: 3+ days

  • Technology Focus: Hardware

  • Cost: Contact us for pricing

  • Related products: ARMv8-A, Cortex-A, Cortex-A72, Cortex-A53

  • Provider: Arm



This course is designed for those who are designing hardware based around the Cortex-A72 and Cortex-A53 MPCore processors.


  • Comprehensive knowledge of the Armv8-A architecture (see notes below)
  • Familiarity with the AMBA on-chip bus architecture
  • Knowledge of embedded systems
  • Experience with digital logic and hardware/ASIC design issues


Hardware design engineers who need to understand the issues involved when designing SoCs around the Arm Cortex-A72 and Cortex-A53 MPCore processors.

Course Length:

3 days


  • Cortex-A72/A53 Processor Overview
  • Armv8 Architecture Overview
  • Cortex-A72 Processor Core
  • Cortex-A53 Processor Core
  • Cortex-A72/A53 Memory Management Unit
  • Cortex-A72/A53 Clocks and Resets
  • Cortex-A72/A53 Power Management
  • CCI-400 Cache Coherent Interconnect (or CCN-504 Cache Coherent Network)
  • Cortex-A72/A53 Memory Sub-Systems
  • GIC-400 Interrupt Controller (or GIC-500 Interrupt Controller)
  • Cortex-A72/Cortex-A53 System Design Considerations
  • Cortex-A72/A53 Debug
  • Cortex-A72 Configuration
  • Cortex-A53 Configuration
  • Cortex-A72/A53 Integration Summary


For students who do not have the pre-requisite knowledge of the Armv8-A architecture and AMBA, we provide an optional one-day introductory course on these subjects.

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