Arm development boards are the ideal platform for accelerating the development and reducing the risk of new SoC designs. The combination of ASIC and FPGA technology in Arm boards delivers an optimal solution in terms of speed, accuracy, flexibility and cost.
- Evaluate, benchmark and start software development using the latest Arm processors.
- Prototype, validate and develop software drivers for new SoC IP blocks.
- Test custom logic blocks or system IP in an FPGA, connected to an Arm core running at ASIC speed.
IoT Test Chip Boards
Arm creates a range of boards to enable easier development or evaluation of Arm IP in real-life conditions. The Arm IoT test chips are based on subsystem IP, offering a foundation for your future designs.
Juno Development Platform
The Armv8-A development platform, also known as Juno, is a software development platform that includes the Juno Arm Versatile Express board and an Armv8-A reference software port available through Linaro.
Neoverse Reference Designs
Neoverse reference designs provide useful resources with best practices on how to integrate a Neoverse compute subsystem within a larger SoC.
FPGA Prototyping Boards
Arm provides a selection of boards available for prototyping, evaluation and benchmarking on Arm Cortex-based designs or IoT subsystems in FPGA.
DesignStart DAPLink Board
The Arm DesignStart DAPLink board can be used to provide DAPLink debug access to the Arm DesignStart Cortex-M1, Cortex-M3 Xilinx Digilent Arty-A7, and Digilent Arty-S7 FPGA evaluation platforms.
Keil Evaluation Boards
Keil design and manufacture evaluation boards and starter kits to help you evaluate a new MCU architecture and get started with the Keil development tools.
Choosing a Board
Find the most appropriate board for your project.
|IP||Juno development platform||Motherboard Express and LogicTile Express FPGA prototyping boards (Soft Macro Model)||MPS2+ FPGA prototyping board||MPS3 FPGA prototyping board||Musca IoT board||Beetle IoT board||Keil evaluation boards||Mbed development boards|
|Cortex-M3 DesignStart /
CoreLink SSE-050 Subsystem
(based on Cortex-M3)
|CoreLink SSE-200 Subsystem
(based on Cortex-M33)
|SSE-123 Example Subsystem|
Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market. You can open a support case by clicking the button below.Arm training courses Open a support case
|Answered||DS-5 5.29.0 on Windows 10 1803||0 votes||5986 views||5 replies||Latest 22 hours ago by Khan Saab||Answer this|
|Discussion||Android NDK options: What compiler flags should I use for my libraries and apps to get the best performance across the widest range of SoCs?||0 votes||4650 views||2 replies||Latest 2 days ago by iosman000||Answer this|
|Answered||Error not upgrading to Android 8.0||0 votes||3631 views||7 replies||Latest 13 days ago by Ronan Synnott||Answer this|
|Answered||arm-none-eabi-ld for binary generation||0 votes||510 views||1 replies||Latest 1 months ago by Joey Ye||Answer this|
|Answered||How to enable share folders between fvp and host linux||0 votes||3015 views||7 replies||Latest 1 months ago by Rob Kaye||Answer this|
|Answered||suggest stm32 evaluation board with 5" touch screen||0 votes||2603 views||3 replies||Latest 1 months ago by ykn||Answer this|
|Answered||DS-5 5.29.0 on Windows 10 1803 Latest 22 hours ago by Khan Saab||5 replies 5986 views|
|Discussion||Android NDK options: What compiler flags should I use for my libraries and apps to get the best performance across the widest range of SoCs? Latest 2 days ago by iosman000||2 replies 4650 views|
|Answered||Error not upgrading to Android 8.0 Latest 13 days ago by Ronan Synnott||7 replies 3631 views|
|Answered||arm-none-eabi-ld for binary generation Latest 1 months ago by Joey Ye||1 replies 510 views|
|Answered||How to enable share folders between fvp and host linux Latest 1 months ago by Rob Kaye||7 replies 3015 views|
|Answered||suggest stm32 evaluation board with 5" touch screen Latest 1 months ago by ykn||3 replies 2603 views|