Musca-B1 Test Chip Board

About Musca-B1

Musca-B1 makes integration of various IP and designing security into your products easier. It not only implements the recommendations of PSA, but also demonstrates Arm IP for evaluation purposes and provides a reference implementation that can be reused in SoC products.

Musca-B1 incorporates CryptoCell, allowing SoC designers to prototype different use cases for either one to serve as a root of trust. It has embedded flash to improve security and better represent a real-world device. Using the latest flash memory controller, it utilizes the Global Flash Bus (GFB) standard.

Musca-B1 is also a software development platform. It has four times the RAM of Musca-A, allowing software developers to not be hindered by memory constraints.

Key product highlights

Musca-B1 is a test chip built from several Arm IP components, these include:

• Arm Cortex-M33 processor
• Arm Corstone-201 foundation IP containing:
• CoreLink SSE-200 Subsystem
• CoreLink SIE-200 system IP
• Cortex-M System Design Kit components
• GFC-100 Generic Flash Controller
• Arm CoreSight SoC-400M debug infrastructure
• Arm TrustZone technology
• CryptoCell-312

The test chip features Arm TrustZone technology. It has improved integration over Musca-A and is manufactured in TSMC 40ULP with embedded flash. Musca-B1 expands upon the Arm secure foundation by building with partner IP.

• Peripheral IP from Cadence such as QSPI, PWM, I2C or I2S
• Power Management Unit from Dolphin Integration
• PLL from Silicon Creations

It is designed to match the requirement of efficient IoT nodes, making it a good model for system development.

Key features

Development platform of choice for PSA
Musca-B1 test chip architecture demonstrates how to design PSA ready systems, providing a tried and tested development platform for secure IoT devices. It has been tested by the Arm software teams and the Arm partners to build software and tools around the Armv8-M architecture.

TrustZone for Armv8-M reference system
The subsystem architecture at the centre of the Musca-B1 test chip expands the Arm TrustZone isolation outside of the processor, throughout the system and is used by all the ecosystem surrounding the new Armv8-M processors.

Dynamic tuning for performance/power with the dual asymmetric Cortex-M33
The processing architecture of the subsystem at the heart of the Musca-B1 test chip ensures that processing performance is available when you need it, but saves energy when processing is not required.