The debug connection you can rely on

The Arm DSTREAM High-Performance Debug and Trace units enable powerful software debug and optimization on any Arm processor-based hardware target.

With features such as accelerated hardware bring-up for many development platforms and open debug interface for use with third-party tools, DSTREAM debug probes provide a comprehensive solution for the development and debug of complex SoCs when paired with Arm Development Studio.

Support for Armv8

Debug and trace for Arm architecture up to Armv8. Whether it's legacy or the very latest, the DSTREAM probe family has it covered.

Lightning Fast Trace

Parallel trace up to 19.2 Gbps, or serial trace (HSSTP, SETM) up to 60 Gbps

Trace CoreSight.

Extended Trace Buffer

Capture extended trace even on the fastest targets to get a detailed picture of software execution.

A bug representing debugging.

Flexible Debug

Adapters for JTAG, CoreSight, TI and MIPI. Compatible with 3rd party IP and debuggers to give you maximum flexibility.


Arm® DSTREAM-XT is a high-performance debug and trace unit that supports CoreSight Debug and Trace over a PCIe connection requiring fewer dedicated debug and trace pins on the SoC compared to traditional debug and trace ports. This enables the Arm Debugger to debug through JTAG, Serial Wire Debug (SWD), or PCIe and simultaneously collect highly detailed instruction and data trace.

  Full specifications


Second-generation debug and trace probe, enabling debug and widest bandwidth parallel trace up to 19.2Gbs over 32 pins, with an 8GB trace buffer and support for all Arm processors. Includes real-time dynamic monitoring to automatically adjust trace sampling between clock edges, and system autodetection with Arm Development Studio. Supports a range of target connectors including JTAG, MICTOR, CoreSight, and MIPI.

  Full specifications  Buy DSTREAM-PT


Second-generation Arm debug probe, enabling maximum debug visibility into Arm processors, with 2.4 Gbps parallel trace over 4 pins, streams trace data directly to host machine, system autodetection with Development Studio. Supports a range of target connectors including JTAG, MICTOR, and CoreSight.

Full specifications  Buy DSTREAM-ST


Second-generation debug and high-speed serial trace probe with up to 60 Gbps combined lane rate, 8 GB trace buffer and system auto-detection with Arm Development Studio. It is optimized for the resolution of complex software, hardware and timing-related issues, and post-analysis of software execution without the need for any software or hardware instrumentation.

Full specifications  Buy DSTREAM-HT


First-generation Arm debug probe enabling debug visibility into Arm processors, with 9.6 Gbps parallel trace or 20 Gbps serial trace, 4 GB trace buffer, system auto-detection with Development Studio. Supports a range of target connectors including JTAG, MICTOR, and CoreSight.

Full specifications

Accelerated development

FPGA acceleration delivers high download speeds and helps you quickly step through your code on single and multicore devices. 

The second-generation probes, DSTREAM-ST, DSTREAM-PT, and DSTREAM-HT come with a state of the art target interface design which auto-tunes to the target platform. 

DSTREAM debug probes are fully integrated into the Arm Development Studio which includes powerful software utilities to assist with SoC bring-up and hardware validation. It also provides interfaces for third-party and custom tools. From initial development to device bring-up, make Development Studio and DSTREAM debug probes your debug solution.

Armv8 support

DSTREAM debug probes are designed with the latest Arm processors and technologies in mind, which are being implemented in ever more complex configurations. Save significant development time with the latest Armv8 SoCs.

Development Studio comes with a platform configuration utility (PCE) that can use DSTREAM ST and DSTREAM-PT to interrogate your target device to autodetect both core and CoreSight configuration elements. PCE can then auto create the Development Studio platform configuration, providing you several debug and trace configurations, saving you time during platform bring up.

To complement this, we also provide a high-level abstraction layer (the debug and trace services layer - DTSL), which makes adding customized trace objects and catering for complex topologies significantly easier. 

Used and trusted by our partners around the world for Armv8 development, DSTREAM debug probes and Development Studio, backed up with Arm expert support have been instrumental to complex Cortex-A based SoC bring up. 

High-bandwidth trace

Trace is an essential tool for the resolution of complex software/hardware and timing-related issues, as it enables post-analysis of a software execution without the need for any software or hardware instrumentation. 

The DSTREAM-PT (up to 8GB) and DSTREAM-HT (up to 16GB) trace buffer enables high-bandwidth parallel trace for long periods, providing further visibility of how the software executes on the target.

Debug probe software

Arm Development Studio together with the DSTREAM debug probes includes powerful software utilities for SoC bring-up and interfaces for third-party IP support.


CoreSight Access Tool (CSAT) 

The CoreSight Access Tool (CSAT) provides a scriptable low-level interface to a target’s CoreSight Debug Access Port (DAP), which gives access to on-chip debug and system buses. CSAT is useful to perform initial bring-up tests before a debugger connection to the target is available. 

CSAT enables the configuration of third-party IP connected to the DAP, for example custom instrumentation hardware, and can be used while a debugger is connected to an Arm processor. This enables the debug of complex hardware-related problems. 


Python scripting 

Arm target connection products implement powerful low-level target control via Python scripts. For example, this allows you to configure them to automatically refresh the watchdog timer while they are connected to the target, and work around hardware bugs. 

Development Studio also uses Jython scripting for debug and trace configuration, making it simple to define complex trace topologies and helping you to route trace to Development Studio 


RDDI API compatibility 

RDDI is the main set of C APIs between Arm debuggers and DSTREAM devices. RDDI contains several API sets and these are supported by each device as follows: 



Third-party debuggers or other customer-specific tooling for both Arm and other processor cores can connect to DSTREAM probes using the RDDI interface. Whilst RDDI is a C level API, other languages can be used, such as Java and Python. The firmware in DSTREAM family has a flexible architecture to connect to multiple Arm and third-party IP cores on an SoC via a single debug interface.

RDDI is freely available from within the Development Studio installation. 

A low-level RDDI connection to DSTREAM units can be used to gain access to the JTAG scan-chains inside the target device. This enables the unit to be used for simple tasks such as production testing and flash programming.


Compare DSTREAM units


Debug connectivity JTAG and Serial-Wire Debug JTAG, Serial-Wire and PCIe
Arm processor support Any Arm processor based hardware target up to Armv8 with CoreSight trace supported
On target trace Yes Yes Yes Yes
External parallel trace 2.4 Gb/s (up to 4 pins) 19.2 Gb/s (up to 32 pins) 2.4 Gb/s (up to 4 pins) 2.4 Gb/s (up to 4 pins)
External serial trace - - Up to 60 Gb/s

Arm HSSTP or Marvell® SETM protocol
Up to 64 Gb/s
Maximum number of supported cores 4096
Cores + CoreSight devices limit  Support for up to 4096 CoreSight devices (including CPUs)
Target connectors
  • 20-pin Arm JTAG
  • 14-pin TI OMAP
  • 10-pin & 20-pin high-density CoreSight connectors
  • 38-pin* MICTOR Connector (*Supporting max external parallel trace up to 4 pins)
  • 20-pin Arm JTAG 
  • 14-pin TI JTAG 
  • 10-pin & 20-pin high-density CoreSight connectors
  • MIPI-60 (QSH) connector
  • Single (16 bit) and dual (32 bit) MICTOR 38 connectors
  • 40-way SAMTEC ERF8
  • Other connectors as per DSTREAM-ST
x1/x4/x8 PCIe Card Slot, up to x16 PCIe Card Edge, mini PCIe Card Slot, M.2 and OCulink
JTAG frequency  180 MHz
Memory download Up to 12 MB/s
Trace buffer None - streamed to host PC On probe 8 GB trace memory store On probe 8 GB trace memory store On probe 16 GB trace memory storage
Host connectivity USB 3.0, Gigabit Ethernet
3rd party support Flexible architecture to support 3rd party IP and debuggers
Device bring-up and test utilities
Remote target reset
Trace capture 4-bit wide trace capture at up to 300 MHz DDR (600 Mbit/s per pin) 32-bit wide trace capture at up to 300 MHz DDR (600 Mbit/s per pin) Up to 6 lanes
Up to 12.5 Gb/s per lane
60 Gb/s max. total bandwidth
Up to 8 lanes @ Gen3 or Up to 4 lanes @ Gen4
64 Gb/s max. total bandwidth
Interface Vref 1.2V - 3.3V (configurable by target)
Minimum software requirements Arm Development Studio or DS-5 5.27  Arm Development Studio 2019.0  Arm Development Studio 2019.0-1  Arm Development Studio 2021.1
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