Arm Socrates

Arm Socrates significantly reduces the time to select, configure and create Arm IP that is error free and ready for SoC integration.

Diagram containing information on Arm SOCRATES.

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.


Intelligent interconnect construction and configuration of Arm IP

CoreLink interconnect creation

Socrates tool value picture

Modern system interconnects are highly configurable IP blocks that need to connect across multiple power and voltage domains to maximize SoC connectivity. Some of the problems facing interconnect design teams today include:

  • SoCs are getting larger, with more components and greater connectivity.
  • SoCs are composed of modular subsystems that bring reuse and timing closure issues.
  • Interconnect backplane must offer multiple services:
    • Lowest latency from CPU to memory
    • QoS guarantees
    • Coherency
    • Virtualization
    • Clock and power management

Socrates addresses all of these issues and guides architects and designers through the configuration and creation of an optimized and viable CoreLink Interconnect. Socrates generates the interconnect µarchitecture, stitches it together, and validates the top level interconnect. Architects and designers can start with the high-level specification, generate the µArchitecture, and create the deliverables (RTL, design specification, testbench, and testcases). Architects and designers can visualize each stage of the design as well as validate the viability and quality using design rule checks.

CoreLink creation vastly reduces the time needed to implement and validate a complex on-chip AMBA® interconnect – down from several months to weeks.

Arm Socrates IP Tooling helps system designers to select and intelligently configure Arm IP, reducing the time to achieve integration ready IP to hours instead of days.

Socrates IP Tooling enables hardware, software, and verification teams to get the system performance they expect - through Arm IP that is configured, built, and integrated right first time. It is the only fully integrated solution for use with Arm System IP.

Socrates IP Tooling  simplifies the configuration of Arm CoreLink System IP. Automatically create a CoreLink interconnect that is right first time.

Internal benchmarking has shown an 8x improvement in schedule when design teams use Socrates IP Tooling for the first time!


Socrates catalog screen shot

Arm IP selection configuration and build in minutes

Socrates includes the Arm IP catalog, which helps users select Arm IP and guides them through a construction, configuration and build in minutes.

Get support

Arm support

Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Open a support case

Community Blogs

Community Forums

Suggested answer AMBA AXI reset
  • AMBA
  • AXI
0 votes 6851 views 2 replies Latest yesterday by Ravi V. Answer this
Suggested answer optimize scaling that involves float division in M0
  • Cortex-M0
  • Floating-Point Execution
0 votes 3154 views 2 replies Latest 2 days ago by Broeker Answer this
Answered strobe 0 votes 5574 views 3 replies Latest 3 days ago by Christopher Tory Answer this
Not answered BUSY transfer just before the last transfer in a burst by a AHB Master. 0 votes 417 views 0 replies Started 3 days ago by ISHWAR GANIGER Answer this
Suggested answer PADDR
  • APB
  • vhdl
  • AMBA 3 APB Interface
0 votes 747 views 1 replies Latest 5 days ago by Colin Campbell Answer this
Not answered ABP wrapper/ resizer 32-128 bit FPGA SoC
  • APB
  • vhdl
  • 128-bit
  • SoC FPGA
0 votes 671 views 0 replies Started 9 days ago by Rann Answer this
Suggested answer AMBA AXI reset Latest yesterday by Ravi V. 2 replies 6851 views
Suggested answer optimize scaling that involves float division in M0 Latest 2 days ago by Broeker 2 replies 3154 views
Answered strobe Latest 3 days ago by Christopher Tory 3 replies 5574 views
Not answered BUSY transfer just before the last transfer in a burst by a AHB Master. Started 3 days ago by ISHWAR GANIGER 0 replies 417 views
Suggested answer PADDR Latest 5 days ago by Colin Campbell 1 replies 747 views
Not answered ABP wrapper/ resizer 32-128 bit FPGA SoC Started 9 days ago by Rann 0 replies 671 views