Socrates

Intelligent interconnect construction and configuration of Arm IP

CoreLink interconnect creation

Modern system interconnects are highly configurable IP blocks that need to connect across multiple power and voltage domains to maximize SoC connectivity. Some of the problems facing interconnect design teams today include:

• SoCs are getting larger, with more components and greater connectivity. 
• SoCs are composed of modular subsystems that bring reuse and timing closure issues. 
• Interconnect backplane must offer multiple services:
  • Lowest latency from CPU to memory. 
  • QoS guarantees. 
  • Coherency. 
  • Virtualization.
  • Clock and power management.

Socrates addresses all of these issues and guides architects and designers through the configuration and creation of an optimized and viable CoreLink Interconnect. Socrates generates the interconnect µarchitecture, stitches it together, and validates the top level interconnect. Architects and designers can start with the high-level specification, generate the µArchitecture, and create the deliverables (RTL, design specification, testbench, and testcases). Architects and designers can visualize each stage of the design as well as validate the viability and quality using design rule checks.

CoreLink creation vastly reduces the time needed to implement and validate a complex on-chip AMBA^® interconnect – down from several months to weeks.

Arm support

Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.