Orange and Blue lines on circuit board.

Simulation models let you develop software for Arm IP even when you do not have access to hardware. They provide a great way to start bare metal or OS-hosted software development for Arm. This removes the problem of starting software design only after physical targets are available. Engineers can get started programming the latest Arm IP at the earliest possible stage, shortening the software development cycle.

Simulation models are developed and tested alongside Arm IP, providing highly accurate and validated virtual prototypes for software development.

Cycle Models

  • 100% cycle accurate models of Arm IP, compiled directly from RTL

  • Prove designs before manufacture

  • Develop bare metal software early

  • Accelerate system-level debugging

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Fast Models

  • Fast and functionally accurate programmers view models of Arm IP

  • Pre-hardware software development

  • Integrates with 3rd party IP models

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Fixed Virtual Platforms

  • Ready-to-use, fast and functionally accurate simulation models

  • Pre-configured virtual prototypes

  • Easy to deploy and scale

  • Fully debuggable and automatable

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AMBA TLM Library

  • AMBA Transaction-Level Modeling library

  • Model approximately-timed and cycle accurate ports

  • C++ pre-compiled binary library

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Arm Flexible Access Models

  • Select the optimum Arm IP and IP configuration

  • Evaluate and design solutions before committing to production

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The Power of Virtual Prototyping: From SoC Design to Software Development

Software-based methodologies involving virtual prototypes are helping to prove out designs earlier and enable companies to parallelize hardware and software development.

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Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market. You can open a support case by clicking the button below.

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Community Forums

Answered Trouble Starting DS-5 Community Edition Debugging with Stratix 10
  • System on Chip (SoC)
  • DS-5 Debugger
  • DS-5 Community Edition
0 votes 7091 views 6 replies Latest 23 hours ago by CMPE_grad Answer this
Answered Map file description of keil linker 0 votes 1602 views 9 replies Latest 4 days ago by Adam Lins Answer this
Answered J-Link fails to connect to target GR-Peach
  • Kernel Developers
  • Renesas RZ Edition
0 votes 1918 views 2 replies Latest 5 days ago by JAgerton Answer this
Answered ARM compilers are no longer available 0 votes 328 views 2 replies Latest 6 days ago by Ronan Synnott Answer this
Answered Complier V6 optimization problem 0 votes 386 views 3 replies Latest 7 days ago by Paul Black Answer this
Answered I can't access to ds.arm.com 0 votes 5998 views 2 replies Latest 7 days ago by Ronan Synnott Answer this
Answered Trouble Starting DS-5 Community Edition Debugging with Stratix 10 Latest 23 hours ago by CMPE_grad 6 replies 7091 views
Answered Map file description of keil linker Latest 4 days ago by Adam Lins 9 replies 1602 views
Answered J-Link fails to connect to target GR-Peach Latest 5 days ago by JAgerton 2 replies 1918 views
Answered ARM compilers are no longer available Latest 6 days ago by Ronan Synnott 2 replies 328 views
Answered Complier V6 optimization problem Latest 7 days ago by Paul Black 3 replies 386 views
Answered I can't access to ds.arm.com Latest 7 days ago by Ronan Synnott 2 replies 5998 views