Sample Arm Cortex-A53 CPAK
Sample Arm Cortex-A53 CPAK

Getting Started

Virtual prototypes play a vital role in the design and analysis of system on chip designs. In order to maximize the time spent being productive with virtual prototypes and minimize the time required to create them, Arm supplies a rich library of Cycle Performance Analysis Kits (CPAKs). These extensible virtual prototypes come complete with models, system information and software to enable designer productivity within minutes of download.


Access CPAKs 


CPAK Features

  • Pre-built virtual prototypes featuring advanced technology such as the Arm Cortex-A72Cortex-A57, Cortex-R8 and Cortex-M7 processors
  • 100% accurate models for critical performance elements including processors, fabric, memory controllers and GPUs
  • Arm Fast Model representations to enable application software development at millions of instructions per second
  • Swap & Play, to enable the Arm Fast Model representation to switch to 100% accuracy at any software break-point
  • Bare-metal software package to initialize components and enable easy customization and benchmarking
  • Linux OS packages including source code 

Simple Customization

CPAKs are designed to be useful immediately after download, but not all SoCs are the same. To better model the behavior of your actual SoC, CPAKs can also be easily customized using SoC Designer. SoC Designer enables IP blocks to be reconfigured or replaced. Additional blocks and subsystems can also be added to the system. Designers are able to take advantage of the complete Arm model ecosystem including models from Arm IP Exchange, models compiled from RTL using Cycle Model Studio or handwritten models in C/C++ or SystemC.

Source code is also provided for all software components to enable easy customization. CPAKs minimize the setup tasks typically associated with SoC design and enable engineers to focus their efforts in more productive areas.

Architectural Analysis

CPAKs are ideally suited for accurate architectural analysis. They contain 100% accurate models compiled directly from RTL and instrumented for interactive design, debug and analysis. CPAKs let you see the behavior of the actual silicon months before it is built. This enables the designer to make architectural decisions with confidence. CPAKs take advantage of all of SoC Designer's architectural analysis and visualizations tools to give the designer unmatched insight into actual SoC behavior.

System Performance Optimization

Although many benchmarks execute on a bare-metal system, a large number of them require an OS to be present. Traditionally this presents a problem because the cycle accurate models which are so beneficial for bare metal benchmarks and optimization are simply too slow to be used with an OS. Even booting an OS on a platform containing only cycle accurate models can take days.

CPAKs for the Linux and Android OS solve this problem by using Arm's Swap & Play technology. This enables the OS to boot in seconds and get to the software area of interest for performance analysis. The system representation is then swapped to be 100% accurate (for all or just part of the system) and execution continues. This technique enables accurate benchmarking and optimizations.

Unmatched IP Integration

Your SoC design doesn't just use IP from a single vendor. Your virtual prototype representation shouldn't either. CPAKs can easily accommodate additional third party IP models. These models can either be added to the CPAK platform or used to replace a delivered component. Future CPAKs will also include select third party IP to further accelerate the integration process.

Community Forums

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Answered Where do I find presentations and photos from SC'18? Started 10 months ago by John Linford 0 replies 1486 views
Suggested answer How to use gcc-arm-none-eabi to compile coremark for cortex M4? Latest 5 hours ago by Cecil1R 10 replies 808 views
Suggested answer For DS-5, How to select the toolchain, whether select_toolchain.bat support input parameter? Latest 6 hours ago by Stephen Theobald 1 replies 352 views
Not answered Print a char in hex not correct. Is is a C51 bug? Started 14 hours ago by gohigh 0 replies 45 views
Not answered How to generate an address size fault? Started 16 hours ago by ohskr27 0 replies 26 views
Suggested answer arm-eabi-gcc-8.3.0.exe: error: CreateProcess: No such file or directory Latest 22 hours ago by Joey Ye 1 replies 366 views
Suggested answer Cortex R GNU C++ Toolchain Latest 22 hours ago by Joey Ye 3 replies 179 views
Suggested answer What is suggested debounce time for keypad? Latest yesterday by ²erik malund 4 replies 408 views
Suggested answer AXI4:- Unaligned transfer Latest yesterday by Ravi V. 2 replies 172 views
Suggested answer nn_quantizer.py in the ML-CIFAR10 examples returning out of range index error for Caffe LeNet example for MNIST Latest yesterday by rafakath 2 replies 784 views
Suggested answer QSP not available error even though ARM DS-5 Gold with env properly set Latest yesterday by 章政 8 replies 6260 views
Suggested answer NIC301 sizing Latest yesterday by Colin Campbell 1 replies 120 views