Getting Started

Fast Models are accurate, flexible programmer's view models of Arm IP, allowing you to develop software such as drivers, firmware, OS and applications prior to silicon availability. They allow full control over the simulation, including profiling, debug and trace. Fast Models can be exported to SystemC and TLM 2.0, allowing integration into the wider SoC design process.

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What's new in Fast Models?

  • Cortex-A78AE, Cortex-A510, Cortex-A710, Neoverse N2, Neoverse V1 and Ethos-U65 have been added to the Fast Models portfolio.
  • CMN-700 r0p0 and MMU-700 have been added to the Fast Models Portfolio.
  • Armv8-R AEM FVP source example has been added to the Fast Models Portfolio, enabling modification of the platform.

Looking for older versions?

Access older versions of Fast Models you hold a license for.

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A bug, A chip, a robot etc.

Components in a Virtual Prototype

A complete virtual prototype of a system contains more than just an Instruction Set Simulator. A full system consists of:

  • Fast, accurate models of cores, subsystems or systems
  • SystemC interface for integration with EDA tools and other IP blocks
  • APIs for debug and trace, allowing full control and an interface to Arm Development Studio, MDK and 3rd party debug tools
  • Python based scripting for runtime control, checking and reporting
  • Visualization, file system access, peripherals and networking from virtual I/O
  • Fully compatible Linaro software stacks, from boot code to Linux and Android OS support

Software Development with Fast Models

Complete & Accurate

Fast Models are available for all Cortex processors, CCI and CCN interconnect, as well as other system IP. Fast Models are functionally accurate, so banked and co-processor registers, exception levels, translation tables and cache coherency are all available to programmers.

Hybrid Simulation

Connect a CPU subsystem to peripherals on hardware emulators via AMBA transactors for emulation acceleration. Compatible with Cadence, Mentor Graphics and Synopsys emulators for maximum flexibility in your software development and IP validation process.

Fixed Virtual Platforms

Fixed versions of Fast Models are also available, giving software developers a ready-to-use model of a complete Arm system. They can be downloaded, licensed individually and imported into Development Studio for ease of use. Fixed Virtual Platforms are a convenient way of testing software without needing to wait for development boards to become available.

Fast Models Library

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Fast Models.

The Fast Models library contains the following models:

Type Family Models Fast Models

Full Library

All Runtime

M-Class Library

M-Class Runtime

Platform Construction Tools

System Canvas

Not Applicable





System Generator

Not Applicable





Model Debugger

Not Applicable





CPU

Neoverse

Neoverse-N2 new,
Neoverse-V1 new,
Neoverse-E1, Neoverse-N1





Cortex-A

Cortex-X1, Cortex-A710 new,
Cortex-A510 new,
Cortex-A78AE new, Cortex-A78,
Cortex-A77, Cortex-A76AE,
Cortex-A76, Cortex-A75,
Cortex-A73, Cortex-A72,
Cortex-A65AE, Cortex-A65,
Cortex-A57, Cortex-A55,
Cortex-A53, Cortex-A35,
Cortex-A32, Cortex-A17,
Cortex-A15, Cortex-A9,
Cortex-A8, Cortex-A7,
Cortex-A5





Cortex-R

Cortex-R52, Cortex-R8,
Cortex-R7, Cortex-R5,
Cortex-R4





Cortex-M

Cortex-M55, Cortex-M35P,
Cortex-M33, Cortex-M23,
Cortex-M7, Cortex-M4,
Cortex-M3, Cortex-M0,
Cortex-M0+





NPU

Neural Processing Unit

Ethos-U65 new, Ethos-U55





System IP

Interconnect

CMN-700 new, CCI-400, CCI-500, CCI-550, CCN-502,
CCN-504, CCN-508, CCN-512,
CMN-600, CMN-600AE





Generic Interrupt Controllers

GIC-400, GIC-500, GIC-600, GIC-600AE, GIC-700





Memory Management Unit (MMU)

MMU-400, MMU-500, MMU-600, MMU-700





Media IP

Mali Display Processors

Mali-DP500, Mali-DP550,
Mali-DP650, Mali-D71





Mali Graphics Processors

Mali-G51, Mali-G71, Mali-G72,
Mali-G76





Mali Video Processors

Mali-V550, Mali-V61





Peripherals and Infrastructure

Interfaces

Ethernet, MMC, CLDC, HDLCD, VirtIO Block, Virtio Plan, VFS





Peripheral

UART, MMU, Mouse and Keyboard, SSP, Timers, Clocks, GPIO





Memories

RAM, Flash, NAND Flash, PL080, PL340, PL350, L2C-310





TrustZone

TZIC, TZMA, TZPC





Other

Visualization, Bridges to AMBA-PV, PV Bus, File/App Loaders





Architectural Fast Models

Architecture

Armv8-A (up to version 8.7)
Armv8-M (up to version 8.1)





Interrupt Controller

GICv2, GICv3, GICv4





SMMU

SMMUv3





Platforms

Neoverse

Neoverse E1 Edge, Neoverse N1 Edge





Corstone

Corstone-300





Corstone-700





 

Fixed Virtual Platform Downloads

Get access to the latest simulation models of Arm IP

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Community Blogs

Community Forums

Answered Forum FAQs
  • ARM Community
0 votes 5399 views 0 replies Started 8 months ago by Annie Answer this
Answered Forum FAQs
  • ARM Community
0 votes 4563 views 0 replies Started 8 months ago by Annie Answer this
Not answered AHB - continue the transfer after an error response 0 votes 89 views 0 replies Started 8 hours ago by Joon Hong Answer this
Not answered Flash Patching in Cortex M7
  • Arm7
  • Cortex-M7
  • System architectures
0 votes 131 views 0 replies Started yesterday by SaiGautamJP Answer this
Answered HSELx behavior for One master to two slave transfer (back to back) for address A (slave1) and address B (slave2) 0 votes 216 views 2 replies Latest yesterday by Tapas Answer this
Not answered A power electronics controls in C/C++ embedded and software pointer for PC program
  • C++
  • Simulation Models
  • Arm Assembly Language (ASM)
  • firmware
  • Hardware Modelling/Simulation
  • Arm Firmware Suite
0 votes 45 views 0 replies Started 2 days ago by Md Mubdiul Answer this
Answered Forum FAQs Started 8 months ago by Annie 0 replies 5399 views
Answered Forum FAQs Started 8 months ago by Annie 0 replies 4563 views
Not answered AHB - continue the transfer after an error response Started 8 hours ago by Joon Hong 0 replies 89 views
Not answered Flash Patching in Cortex M7 Started yesterday by SaiGautamJP 0 replies 131 views
Answered HSELx behavior for One master to two slave transfer (back to back) for address A (slave1) and address B (slave2) Latest yesterday by Tapas 2 replies 216 views
Not answered A power electronics controls in C/C++ embedded and software pointer for PC program Started 2 days ago by Md Mubdiul 0 replies 45 views