SUSE delivers a Linux distribution that is optimized for 64-bit Arm systems, as well as an Arm-based platform for High Performance Computing (HPC).
SUSE is the largest independent open source company, providing open source solutions and technologies for the enterprise to simplify, modernize, and accelerate traditional and cloud-native applications across the IT landscape in any environment including Arm.
SUSE offers open source solutions, services, and support in three key areas:
- Enterprise Linux and Containers
- Cloud Computing including hybrid cloud
- Edge Computing
SUSE Linux Enterprise Server
SUSE Linux Enterprise Server for Arm is an enterprise-grade Linux distribution that is optimized for unique 64-bit Arm chip capabilities. It enables solutions providers and enterprise early adopters to gain faster time to market for innovative server and Internet of Things (IoT) devices solutions.
High Performance Computing
SUSE Linux Enterprise for High Performance Computing (HPC) is a highly scalable, high-performance open source operating system that is designed to utilize the power of parallel computing for modeling, simulation, and advanced analytics applications.
SUSE open source repositories
SUSE builds from a range of community projects and programs. Developers can experiment with new features using openSUSE and Tumbleweed. openSUSE Build Service provide developers with the infrastructure where Arm-based packages are built including additional software from the SUSE Package Hub.
|Suggested answer||casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange||0 votes||193 views||2 replies||Latest 6 days ago by zca||Answer this|
|Not answered||CORTEX-A8||0 votes||61 views||0 replies||Started 7 days ago by JackShan||Answer this|
|Not answered||Debug problem of FM4-S6E2CC-ETH||0 votes||71 views||0 replies||Started 8 days ago by yuanxing1992||Answer this|
|Not answered||L1 cache BW||0 votes||85 views||0 replies||Started 16 days ago by icurry||Answer this|
|Not answered||Exception Level Switch in ARMv8||0 votes||87 views||0 replies||Started 16 days ago by icurry||Answer this|
|Not answered||About SPI flash programming in Windows-on-Arm||0 votes||98 views||0 replies||Started 19 days ago by Kelvin Chan||Answer this|
|Suggested answer||casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange Latest 6 days ago by zca||2 replies 193 views|
|Not answered||CORTEX-A8 Started 7 days ago by JackShan||0 replies 61 views|
|Not answered||Debug problem of FM4-S6E2CC-ETH Started 8 days ago by yuanxing1992||0 replies 71 views|
|Not answered||L1 cache BW Started 16 days ago by icurry||0 replies 85 views|
|Not answered||Exception Level Switch in ARMv8 Started 16 days ago by icurry||0 replies 87 views|
|Not answered||About SPI flash programming in Windows-on-Arm Started 19 days ago by Kelvin Chan||0 replies 98 views|