Ceph is a distributed data-storage system that enables distributed operations without a single point of failure, scalable to exabyte levels. ​Combined with Arm, Ceph enables significant power savings. ​

Ceph delivers object, block, and file storage in one unified system providing a highly reliable, easy to manage solution. Ceph storage clusters are based on Reliable Autonomic Distributed Object Store (RADOS), which forms the foundation for all Ceph deployments. 


Ceph storage solution

Ceph enables data replication for a high degree of fault tolerance, enabling the design of systems that are both self-healing and self-managing, minimizing administration time and costs. Arm SoCs enable Ceph to take advantage of low power solutions, while balancing compute performance and energy efficiency with deeply integrated and large-scale direct media connectivity.

Learn more

Ambedded

Arm based Ceph storage appliances from Ambedded provide object storage, block storage, and file system in a single system. Using Arm enables lower power consumption compared to the same density x86 server. Ambedded is partnered with SUSE for SUSE Enterprise Storage Appliance, to provide organizations with durable, reliable, simple to manage, and fast to deliver, software-defined storage solutions.

Learn more

SoftIron

SoftIron HyperDrive systems are specifically designed for Ceph and optimized to maximize performance. Developers can maximize compute density and optimize power usage with SoftIron and Arm.

Learn more


Resources


Community Forums

Not answered the best chipset/motherboard for my project 0 votes 50 views 0 replies Started yesterday by Sebastiaan ProjectG Answer this
Not answered How to set up stage-2 translation table
  • Armv8-A
0 votes 61 views 0 replies Started 4 days ago by irakatz Answer this
Not answered LPC1857 (MCB1800) Setup CAN Bus Port Manually 0 votes 83 views 0 replies Started 7 days ago by Nicholas_ Answer this
Suggested answer casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange 0 votes 227 views 2 replies Latest 15 days ago by zca Answer this
Not answered CORTEX-A8 0 votes 78 views 0 replies Started 15 days ago by JackShan Answer this
Not answered Debug problem of FM4-S6E2CC-ETH 0 votes 88 views 0 replies Started 16 days ago by yuanxing1992 Answer this
Not answered the best chipset/motherboard for my project Started yesterday by Sebastiaan ProjectG 0 replies 50 views
Not answered How to set up stage-2 translation table Started 4 days ago by irakatz 0 replies 61 views
Not answered LPC1857 (MCB1800) Setup CAN Bus Port Manually Started 7 days ago by Nicholas_ 0 replies 83 views
Suggested answer casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange Latest 15 days ago by zca 2 replies 227 views
Not answered CORTEX-A8 Started 15 days ago by JackShan 0 replies 78 views
Not answered Debug problem of FM4-S6E2CC-ETH Started 16 days ago by yuanxing1992 0 replies 88 views