Technical resources for DesignStart Pro

The Arm Cortex-A5 processor is ideal for building high-performance and feature-rich SoCs for embedded and IoT applications. The Cortex-A5 processor is the smallest application processor in the Cortex-A family of processors, allowing you to meet performance, power, and area requirements for cost-sensitive, low-power applications. With an integrated Memory Management Unit (MMU), the processor can run rich operating systems, such as Linux.

The Cortex-A5 DesignStart package offers an easy and low-cost route to license the processor and a comprehensive IP package.

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Cortex-A5 DesignStart package

Overview

Hardware IP (CPU and System IP package)
  • Cortex-A5 CPU with Neon media processing engine
  • Configurable AXI Interconnect
  • L2 Cache controller
  • Debug and Trace module (CoreSight)
  • SRAM controller
  • Watchdog, Timer, UART
  • General purpose I/O peripheral
  • Real Time Clock
  • True Random Number Generator*
Hardware reference design* SSE-500 Example Subsystem
FPGA prototyping* Arm MPS3 Prototyping board
Software support Linux
Simulation model Arm Fast model and Cycle model (1-year free trial term)
Development tools
  • Socrates: Arm Interconnect configuration tool
  • Arm Development Studio for software development (30 day trial)*

*Features available in upcoming release.


Register your interest to track the upcoming releases.**

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**All existing customers of Cortex-A5 DesignStart will be notified on the progress of the release and they will have access to the new features once they are available, with no additional access fees.


Cortex-A5 DesignStart package

Available now

CPU and System IP package

  • Cortex-A5 CPU with Neon media processing engine
  • Configurable AXI Interconnect
  • L2 Cache controller
  • Debug and Trace module (CoreSight)
  • SRAM controller
  • Watchdog, Timer, UART
  • General Purpose I/O peripheral
  • Real Time Clock

For detailed features and benefits of Cortex-A5, please visit the Cortex-A5 CPU product page.

Simulation model

Arm Fast Model allows developers to start their software development before the hardware or silicon is available. The same software can be ported onto the silicon, once it is available. The Cortex-A5 DesignStart Fast Model offers a virtual platform with a reference Linux port to accelerate your software development.

The Cycle Model is a cycle-accurate model of the Cortex-A5 DesignStart and can be used for performance evaluation.   

Download models

Linux port

The Cortex-A5 DesignStart package comes with a basic Linux port that enables users to take benefits of the extensive open-source support, which includes middleware, device drivers, frameworks and more for Arm IP.

  • Trusted Firmware A with Armv7 support, offering a foundation for adding security features
  • U-Boot with generic Timer support
  • Linux kernel support enabling access to extensive open-source repository for Arm
  • Yocto based poky-tiny distro support for easy build, distribute and deployment
  • Complete Software with build and fetch instructions will be available through community pages

Currently, a Linux port is available for the Fast Model, which offers a programmer’s view of the Cortex-A5 DesignStart package including CPU IP, system IP and the SSE-500 example subsystem.

Download Linux Port

Getting Started Guide

This getting started guide provides a detailed view on the contents of the Cortex-A5 DesignStart package. It also includes the new features that will be added to the existing package in the next few months, including a subsystem reference design and the Linux port. Also, there is a section titled, 'Programmers Model' that shows the memory map and registers layout of the subsystem. 

Read here


Upcoming releases

The following features will be released soon.

SSE-500 Example Subsystem

Building the system around a processor requires integrating many IP blocks together and verifying the assembly thoroughly to ensure your SoC is working as it should. To ease this process, Arm has designed this subsystem that can be directly integrated into your design. The subsystem is pre-validated and pre-integrated, with many configuration points to adapt to different use cases. They substantially accelerate time-to-market and reduces design complexity of custom silicon projects.

The SSE-500 example subsystem offers four user expansion interfaces that can be used to add new IP into the design, alleviating the need to reconfigure the Interconnect (NIC-400). For designs that need to reconfigure the Interconnect as per the specific needs, extensive documents and scripts are offered in the package.

FPGA prototyping

Develop and debug the design on the Arm MPS3 Prototyping board prior to implementing the optimized design on silicon. This board can also be used for firmware and application development before the silicon is ready.

Learn more

Arm Development Studio

The Arm Development Studio provides a comprehensive embedded C/C++ dedicated software development solution. With DesignStart, you can get access to a 30-day trial.

Learn more


Commercials

 Upfront fees (two options to choose from)

Option 1

$75k with 1 year dedicated support and onboarding call with Arm engineers

Option 2

3 years' dedicated technical support and onboarding call with Arm engineers

 Tape-out fee

 $50k (once paid during tape-out of the silicon)

 Royalty per unit

 Small % of average selling price of Cortex-A5 based silicon

Try the Cortex-A5 DesignStart package free-of-cost

Download the Arm Simulation Models, along with the reference Linux port.

  • Virtual platform that offers a programmer's view of the Cortex-A5 DesignStart package including CPU IP, system IP and the SSE-500 example subsystem
  • Reference Linux port to start your software development
  • Evaluate the performance of the system
  • Port the same software on the actual hardware, after licensing Cortex-A5 DesignStart

Try now