Getting Started

Cycle models are compiled directly from Arm RTL and retain complete functional and cycle accuracy. This enables users to confidently make architectural decisions, optimize performance or develop bare metal software.


Performance Optimization with Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm DS-5. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in Arm SoC Designer and certain models can also be used in SystemC simulation environments.

Swap & Play

Many Cycle Models support Swap & Play which enables a system to start running using a Fast Model representation and then switch to a Cycle Model representation at any breakpoint. This means a virtual prototype can boot an OS in a minute and then switch to a 100% accurate version to enable detailed debug and analysis. 

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

CPU and Subsystem Portfolio

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Cycle Models.

CPU Cycle Models


Arm IP Exchange

CPU Family Processor
Cortex-A Series Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15, Cortex-A53, Cortex-A57, Cortex-A72
Cortex-R Series Cortex-R4, Cortex-R5, Cortex-R7, Cortex-R8
Cortex-M Series Cortex-M0, Cortex-M0+, Cortex-M3, Cortex-M4

Faster Productivity with CPAKs


Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models

System IP Family
Interconnect NIC-400, NIC-301, CCI-400, CCN-502, CCN-504, CCN-508
Interrupt Controllers GIC400, PL190, PL192, PL390
System Memory Management Units MMU-400
Memories DMC-400,PL340, PL341, PL351, PL352, PL353 and PL354

Cycle Models for DesignStart

Arm DesignStart makes innovation more accessible than ever. Whether you want to differentiate your product or conduct research, get started on a trusted, proven foundation with Arm IP and services. Cycle Models for DesignStart are included free of cost in the Cortex-M3 evaluation program to enable faster simulation and enhanced system visibility compared to RTL simulation.

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Get support

Arm support

Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Open a support case

Community Blogs

Community Forums

Answered Where do I find presentations and photos from SC'18? 0 votes 421 views 0 replies Started 2 months ago by John Linford Answer this
Discussion Please consider my tag for inclusion on the ARM Community 1 votes 16564 views 25 replies Latest 1 months ago by SULMIYATDAD Answer this
Suggested answer IPMI Energy Agent 0 votes 252 views 7 replies Latest 7 hours ago by Patrick Wohlschlegel Answer this
Suggested answer Arm keil optimization 0 votes 31 views 1 replies Latest 7 hours ago by srujana Answer this
Not answered RTOS on one core and Android on another core
  • Real Time Operating Systems (RTOS)
  • Android
  • Cortex-A15
  • embedded hypervisor
  • hypervisor
0 votes 0 views 0 replies Started 9 hours ago by Naidu A Answer this
Suggested answer ARM's Server "internal error" for license 0 votes 104 views 3 replies Latest 9 hours ago by ranchu Answer this
Answered Non-secure EXC_RETURN value to Secure HardFault Handler 0 votes 71 views 2 replies Latest 15 hours ago by Rajiv Answer this
Not answered Use GICv3 legacy support
  • gicv2
  • GICv3/v4
0 votes 34 views 0 replies Started 21 hours ago by josecm Answer this
Suggested answer Arm DS-5 community edition - Email with download link never came
  • Arm Development Studio
0 votes 80 views 3 replies Latest yesterday by Tony Armitstead Answer this
Discussion Looking for activation code of DS-5 Community Edition 0 votes 4493 views 16 replies Latest yesterday by Drarkin Answer this
Suggested answer Cortex M1 License? 0 votes 65 views 2 replies Latest yesterday by Thomas P Answer this
Suggested answer Removal of WID's in AMBA AXI4 0 votes 85 views 1 replies Latest yesterday by Colin Campbell Answer this
Answered Where do I find presentations and photos from SC'18? Started 2 months ago by John Linford 0 replies 421 views
Discussion Please consider my tag for inclusion on the ARM Community Latest 1 months ago by SULMIYATDAD 25 replies 16564 views
Suggested answer IPMI Energy Agent Latest 7 hours ago by Patrick Wohlschlegel 7 replies 252 views
Suggested answer Arm keil optimization Latest 7 hours ago by srujana 1 replies 31 views
Not answered RTOS on one core and Android on another core Started 9 hours ago by Naidu A 0 replies 0 views
Suggested answer ARM's Server "internal error" for license Latest 9 hours ago by ranchu 3 replies 104 views
Answered Non-secure EXC_RETURN value to Secure HardFault Handler Latest 15 hours ago by Rajiv 2 replies 71 views
Not answered Use GICv3 legacy support Started 21 hours ago by josecm 0 replies 34 views
Suggested answer Arm DS-5 community edition - Email with download link never came Latest yesterday by Tony Armitstead 3 replies 80 views
Discussion Looking for activation code of DS-5 Community Edition Latest yesterday by Drarkin 16 replies 4493 views
Suggested answer Cortex M1 License? Latest yesterday by Thomas P 2 replies 65 views
Suggested answer Removal of WID's in AMBA AXI4 Latest yesterday by Colin Campbell 1 replies 85 views