Cycle Model Studio

Platform Integrations

It is important to be able to use your hardware models in your choice of system on chip verification environments. Cycle Model Studio was architected to support any system simulation environment. There is no need to develop unique models for each platform. Cycle Model Studio provides direct integration into the following verification environments:

• Arm SoC Designer
• All TLM-2.0 virtual prototype environments
• All SystemC simulation environments
• RTL simulation environments from Synopsys, Cadence and Mentor

One Model - Many Uses

Cycle Model Studio's many platform integrations mean that you have the versatility to use the Cycle Models in all of your development environments. Software engineers can focus on a "data-book" view of the device for programming. Architects have access to the buses, interfaces and transactions. Hardware engineers have full debug flexibility and visibility into the RTL including waveform dumping. Because the model is common, all of your teams can work on solving problems, instead of the error prone process of porting models across different verification environments.