Getting Started

Cycle models are compiled directly from Arm RTL and retain complete functional and cycle accuracy. This enables you to confidently make architectural decisions, optimize performance or develop bare metal software.

Performance Optimization with Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm Development Studio. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in SystemC simulation environments as well as RTL simulators.

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

Get started with Cortex-M55 today within a familiar Cortex-M development environment

Compare performance, learn new instructions and optimize code with single programmer’s model for DSP/ML workloads.

More about Arm tools for Cortex-M55

CPU and Subsystem Portfolio

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Cycle Models.

CPU Cycle Models


Arm IP Exchange

CPU Family Processor
Cortex-A Series Cortex-A75, Cortex-A65, Cortex-A65AE, Cortex-A76AE, Cortex-A55, Cortex-A53, Cortex-A35, Cortex-A32
Cortex-R Series Cortex-R52, Cortex-R8, Cortex-R5
Cortex-M Series Cortex-M0+, Cortex-M7, Cortex-M23, Cortex-M33, Cortex-M55

Faster Productivity with CPAKs


Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models

System IP Family
Interconnect NIC-400, CMN-600, CCI-550
Interrupt Controllers GIC-600, GIC-500
System Memory Management Units MMU-600
Memories BP-140, DMC-400

Free White Papers

Cortex A53 System Optimization »

Software Driven Power Analysis »

Modeling Techniques Maximize Value of Virtual Platforms »

More Resources

Cycle Models for DesignStart

Arm DesignStart makes innovation more accessible than ever. Whether you want to differentiate your product or conduct research, get started on a trusted, proven foundation with Arm IP and services. Cycle Models for DesignStart are included free of cost in the Cortex-M3 evaluation program to enable faster simulation and enhanced system visibility compared to RTL simulation.

Learn more

Get support

Community Forums

Answered System wide cache flush
  • Cortex-A35
  • Cache coherency
  • Armv8-A
  • Cache Management
 0 votes 423 views 5 replies Latest 11 hours ago by Norbert Goldstein Answer this
Answered ERROR: [IP_Flow 19-3461] Value 'reset' is out of the range for parameter 'RESET BOARD INTERFACE(RESET_BOARD_INTERFACE)' for BD cell 0 votes 1498 views 3 replies Latest yesterday by jpthibault Answer this
Answered strobe 0 votes 5415 views 3 replies Latest 2 days ago by Christopher Tory Answer this
Answered A perfectly fine working code suddenly stops working as per expectation.Addition deletion of some extra code/ data make it work again. 0 votes 9650 views 13 replies Latest 2 days ago by Andy Neil Answer this
Answered can't find any device after installing the package 0 votes 274 views 2 replies Latest 2 days ago by kk_2412 Answer this
Answered Mali T720 VRAM increase when render with high FPS 1 votes 583 views 3 replies Latest 2 days ago by Android Jeff Answer this
Answered System wide cache flush Latest 11 hours ago by Norbert Goldstein 5 replies 423 views
Answered ERROR: [IP_Flow 19-3461] Value 'reset' is out of the range for parameter 'RESET BOARD INTERFACE(RESET_BOARD_INTERFACE)' for BD cell Latest yesterday by jpthibault 3 replies 1498 views
Answered strobe Latest 2 days ago by Christopher Tory 3 replies 5415 views
Answered A perfectly fine working code suddenly stops working as per expectation.Addition deletion of some extra code/ data make it work again. Latest 2 days ago by Andy Neil 13 replies 9650 views
Answered can't find any device after installing the package Latest 2 days ago by kk_2412 2 replies 274 views
Answered Mali T720 VRAM increase when render with high FPS Latest 2 days ago by Android Jeff 3 replies 583 views