Getting Started

Cycle models are compiled directly from Arm RTL and retain complete functional and cycle accuracy. This enables you to confidently make architectural decisions, optimize performance or develop bare metal software.

Performance Optimization with Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm Development Studio. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in SystemC simulation environments as well as RTL simulators.

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

Get started with Cortex-M55 today within a familiar Cortex-M development environment

Compare performance, learn new instructions and optimize code with single programmer’s model for DSP/ML workloads.

More about Arm tools for Cortex-M55

CPU and Subsystem Portfolio

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Cycle Models.

CPU Cycle Models


Arm IP Exchange

CPU Family Processor
Cortex-A Series Cortex-A75, Cortex-A65, Cortex-A65AE, Cortex-A76AE, Cortex-A55, Cortex-A53, Cortex-A35, Cortex-A32
Cortex-R Series Cortex-R52, Cortex-R8, Cortex-R5
Cortex-M Series Cortex-M33, Cortex-M23, Cortex-M7, Cortex-M3, Cortex-M0+

Faster Productivity with CPAKs


Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models

System IP Family
Interconnect NIC-400, CMN-600, CCI-550
Interrupt Controllers GIC-600, GIC-500
System Memory Management Units MMU-600
Memories BP-140, DMC-400

Free White Papers

Cortex A53 System Optimization »

Software Driven Power Analysis »

Modeling Techniques Maximize Value of Virtual Platforms »

More Resources

Cycle Models for DesignStart

Arm DesignStart makes innovation more accessible than ever. Whether you want to differentiate your product or conduct research, get started on a trusted, proven foundation with Arm IP and services. Cycle Models for DesignStart are included free of cost in the Cortex-M3 evaluation program to enable faster simulation and enhanced system visibility compared to RTL simulation.

Learn more

Get support

Community Blogs

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Accelerate development with Development Studio 2020.0

 The Spring release of Arm Development Studio 2020.0 provides an update to all Development Studio  provides support for the latest Arm IP and includes useful new features across all the editions.

17 hours ago by Ronan Synnott
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Arm Researcher wins IEEE ComSoc Award in Parliament | STEM for Britain 2020

STEM for Britain is an annual poster competition for early-career researchers in science, technology, engineering and maths. This year, Ben Fletcher was selected to present his research in the finals to Members of the Houses of Parliament. Ben…

yesterday by Ben Fletcher
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MPI+Singularity containers: compatibility matrices for Ubuntu Eaon on Arm64

Read about MPI and Singularity containers and how they are compatible with matrices for Ubuntu Eaon on Arm64.

4 days ago by Geoffroy Vallee
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New Arm Neoverse Developer Community: An improved experience for developers…

Read about the new improved experience for the Arm Neoverse Developer Community.

6 days ago by Kevin Ryan
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Vulkan Mobile Best Practices - Management of Command Buffers and…

In this blog we explain the best way to manage command buffers and multi threaded recording when using Vulkan according to our best practices mobile.

6 days ago by José Emilio
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Raspberry Pi for Computer Vision Review: CV for the Masses

Read a review of Raspberry Pi for Computer Vision.

12 days ago by Karl Fezer

Community Forums

Answered Where can I find more information regarding CI/CD support for AArch64? 0 votes 519 views 6 replies Latest 12 hours ago by Kushal Koolwal Answer this
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Answered Where can I find more information regarding CI/CD support for AArch64? Latest 12 hours ago by Kushal Koolwal 6 replies 519 views
Answered Non-secure configuration of UART1 on Arm Musca-A1 Latest yesterday by Daniel Oliveira 4 replies 332 views
Answered Arm64 Long Format Translation Table Walk Latest yesterday by angeld 2 replies 221 views
Answered timestamp generator register location on Cortex-M4 (PSELCTRL CNTCR) Latest yesterday by 42Bastian Schick 1 replies 350 views
Answered what's the name of this electronic component? Latest yesterday by Dean03 3 replies 1287 views
Answered Cortex M0 - Returning from Interrupt Latest 3 days ago by Mezan1 13 replies 1560 views