Getting Started

Cycle models are compiled directly from Arm RTL and retain complete functional and cycle accuracy. This enables you to confidently make architectural decisions, optimize performance or develop bare metal software.

Performance Optimization with Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm Development Studio. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in SystemC simulation environments as well as RTL simulators.

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

Get started with Cortex-M55 today within a familiar Cortex-M development environment

Compare performance, learn new instructions and optimize code with single programmer’s model for DSP/ML workloads.

More about Arm tools for Cortex-M55

CPU and Subsystem Portfolio

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Cycle Models.

CPU Cycle Models


Arm IP Exchange

CPU Family Processor
Cortex-A Series Cortex-A75, Cortex-A65, Cortex-A65AE, Cortex-A76AE, Cortex-A55, Cortex-A53, Cortex-A35, Cortex-A32
Cortex-R Series Cortex-R52, Cortex-R8, Cortex-R5
Cortex-M Series Cortex-M33, Cortex-M23, Cortex-M7, Cortex-M3, Cortex-M0+

Faster Productivity with CPAKs


Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models

System IP Family
Interconnect NIC-400, CMN-600, CCI-550
Interrupt Controllers GIC-600, GIC-500
System Memory Management Units MMU-600
Memories BP-140, DMC-400

Free White Papers

Cortex A53 System Optimization »

Software Driven Power Analysis »

Modeling Techniques Maximize Value of Virtual Platforms »

More Resources

Cycle Models for DesignStart

Arm DesignStart makes innovation more accessible than ever. Whether you want to differentiate your product or conduct research, get started on a trusted, proven foundation with Arm IP and services. Cycle Models for DesignStart are included free of cost in the Cortex-M3 evaluation program to enable faster simulation and enhanced system visibility compared to RTL simulation.

Learn more

Get support

Community Blogs

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Accelerating Innovation for Safety Systems with Arm Flexible Access

Arm is proud to announce the addition of Arm Safety Packages for select IP within Arm Flexible Access, with the goal to make it easier for developers in the automotive and other safety-related industries to create SoCs.

4 days ago by Chet Babla
1
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How to use the Memory Model Tool

Learn how to use the Memory Model Tool and develop an intuitive understanding of how it works through this working example. The information is useful to software developers, compiler writers, and verification engineers.

5 days ago by Jade Alglave
1
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The New Era of Augmented Reality: A Look at the Present, Near Future and…

This blog explains how various use cases will develop through the new era of augmented reality - now, in the near future and in the far future.

6 days ago by Ian Pilkington
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Native Chromium Builds Available for Windows on Arm

Blog provides information about Native Chromium builds now being available for Windows on Arm

9 days ago by Richard Townsend
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TinyML Applications Require New Network Architectures

Researchers have studied neural network compression for quite some time. However, the need for always on compute has led to a recent trend towards executing these applications on even smaller IoT devices. The neural networks that are traditionally…

10 days ago by Urmish Thakker
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Arm Cortex-M55 and Ethos-U55 Processors: Extending the Performance of Arm’s…

The new Arm Cortex-M55 and Ethos-U55 processors significantly increase machine learning and signal processing performance efficiently for the next generation of AI-capable IoT devices. Read this blog to learn about the features of this new technology

13 days ago by Thomas Lorenser

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Answered FMC problem on GD32E103 0 votes 371 views 2 replies Latest 3 days ago by JosepI Answer this
Answered LPC55S69:CMSIS-DAP - ARMv8-M Error 0 votes 603 views 4 replies Latest 4 days ago by hzt_ Answer this
Answered M4 Deep Sleep Latest 19 hours ago by AliRizaDenenPezevenk 2 replies 236 views
Answered GPU & High-Performance Computing $100K Research Challenge Latest 2 days ago by John Linford 4 replies 3151 views
Answered Does MSR DAIF require ISB instruction? If no, why? Latest 3 days ago by scopichmu 2 replies 420 views
Answered STM32F413ZG Program Size - code, RO-data,RW-data,ZI-data Latest 3 days ago by June Zhou 4 replies 569 views
Answered FMC problem on GD32E103 Latest 3 days ago by JosepI 2 replies 371 views
Answered LPC55S69:CMSIS-DAP - ARMv8-M Error Latest 4 days ago by hzt_ 4 replies 603 views