Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm Development Studio. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in Arm SoC Designer and certain models can also be used in SystemC simulation environments.

Swap & Play

Many Cycle Models support Swap & Play which enables a system to start running using a Fast Model representation and then switch to a Cycle Model representation at any breakpoint. This means a virtual prototype can boot an OS in a minute and then switch to a 100% accurate version to enable detailed debug and analysis. 

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

CPU Cycle Models

Arm IP Exchange

Faster Productivity with CPAKs

Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models