Getting Started

Cycle models are compiled directly from Arm RTL and retain complete functional and cycle accuracy. This enables you to confidently make architectural decisions, optimize performance or develop bare metal software.

Performance Optimization with Cycle Models

Instrumented for Analysis

Cycle Models are instrumented to enable detailed debug and analysis. CPU cores enable interactive debug with Arm Development Studio. Additionally, all registers and PMUs are visible along with information related to cache hits, pipeline statistics and much more.

Implementation level accuracy

Cycle Models are compiled directly from the implementation RTL and retain 100% of the functionality and cycle accuracy. Cycle Models can be used in SystemC simulation environments as well as RTL simulators.

Creation of Arm Cycle Models

Cycle Models are available 24 hours a day/7 days a week from Arm’s IP Exchange web portal. This portal enables users to access, configure, compile and manage their own models of Arm IP. Users are then emailed when their model is available for download

Arm DevSummit: designed for hardware and software engineers

Join Arm and its ecosystem partners to explore the latest advancements in computing for helping engineers designing and building integrated solutions. In 2020, deep-dive workshops and technical sessions will be held in an immersive virtual forum.

Get your free conference pass

CPU and Subsystem Portfolio

Arm releases models of our IP to lead partners at an early stage, so please contact us for more information on upcoming Cycle Models.

CPU Cycle Models


Arm IP Exchange

CPU Family Processor
Cortex-A Series Cortex-A55, Cortex-A53, Cortex-A35, Cortex-A32
Cortex-R Series Cortex-R52, Cortex-R8, Cortex-R5, Cortex-R82*
Cortex-M Series Cortex-M0+, Cortex-M7, Cortex-M23, Cortex-M33, Cortex-M55

*Contact us to get access to these models prior to public release.

Faster Productivity with CPAKs


Arm System Exchange

In order to deliver a faster path to productivity, Arm offers an extensive library of prebuilt virtual systems featuring Cycle Models. These Cycle Performance Analysis kits are system models featuring multiple Cycle Models together with bare metal software or Linux level benchmarks. The complete selection of CPAKs is available for download from Arm System Exchange.

System IP Cycle Models

System IP Family
Interconnect NIC-400, CCI-550, CCI-500
Interrupt Controllers GIC-600, GIC-500
Memories BP-140

Free White Papers

Cortex A53 System Optimization »

Software Driven Power Analysis »

Modeling Techniques Maximize Value of Virtual Platforms »

More Resources

Cycle Models for DesignStart

Arm DesignStart makes innovation more accessible than ever. Whether you want to differentiate your product or conduct research, get started on a trusted, proven foundation with Arm IP and services. Cycle Models for DesignStart are included free of cost in the Cortex-M3 evaluation program to enable faster simulation and enhanced system visibility compared to RTL simulation.

Learn more

Get support

Community Blogs

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在gem5里支持arm Transactional Memory扩展

本文翻译https://community.arm.com/developer/research/b/articles/posts/arms-transactional-memory-extension-support ，作者Timothy Hayes，译者：Zenon Xiu 并发的变迁 2005年， Herb Sutter发表了他的研讨会文章“免费的午餐结束了” （Sutter，2005）。他指出，微处理器的顺序执行性能到了停滞期，产业界将通过增加核心数量来提升更多的

yesterday by Zenon_Xiu
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Lenovo adopts Arm technology as it expands its 5G strategy

Arm technology can now be found across Lenovo’s 5G infrastructure product portfolio with the Lenovo’s FutureCore 5G Core Network server built on an Arm-based CPU designed in China.

yesterday by Frank Zou
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Optimizing Android games has never been easier

In this blog, read views about optimizing Android games.

3 days ago by Ramnath Swamy
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Arm enables the lowest power IoT devices with new Ambiq Apollo4 SoC on…

In this blog, read about IoT devices and Ambiq Apollo4 SoC using TSMC 22nm ULP and ULL libraries.

4 days ago by Wolfgang Helfricht
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Easier Android profiling with Arm Mobile Studio 2020.3

Arm Mobile Studio 2020.3, our suite of application profiling tools for Android development, delivers the final piece in a set of quality-of-life improvements we have been talking about since launching at GDC 2019.

4 days ago by Peter Harris
1
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University of Edinburgh: An Arm Research Centre of Excellence

Our collaboration with the University of Edinburgh supports fundamental research questions across a wide range of computer science.

4 days ago by Rhiannon Burleigh

Community Forums

Answered 32-bit x 32-bit --->64-bit multiply
  • Cortex-M0
  • Cortex-M0+
  • Arm Assembly Language (ASM)
 0 votes 450 views 4 replies Latest 9 hours ago by Sean Dunlevy Answer this
Answered Program size of empty main function 0 votes 204 views 3 replies Latest 13 hours ago by slawek krzysiek Answer this
Answered Does ARMv8.5 Branch Target Identification works for hugepages (2MiB) memory mapping? 0 votes 52 views 1 replies Latest 13 hours ago by qwertytmp1 Answer this
Answered How to run arm code in x86 linux host machine? 0 votes 1419 views 2 replies Latest 14 hours ago by Sajid Answer this
Answered How to enable a shared directory between the booted guest OS on Morello FVP and the host linux machine 0 votes 7704 views 11 replies Latest 16 hours ago by Andy Nisbet Answer this
Answered ds-5 community edition request link 0 votes 132 views 3 replies Latest 18 hours ago by Andy Neil Answer this
Answered 32-bit x 32-bit --->64-bit multiply Latest 9 hours ago by Sean Dunlevy 4 replies 450 views
Answered Program size of empty main function Latest 13 hours ago by slawek krzysiek 3 replies 204 views
Answered Does ARMv8.5 Branch Target Identification works for hugepages (2MiB) memory mapping? Latest 13 hours ago by qwertytmp1 1 replies 52 views
Answered How to run arm code in x86 linux host machine? Latest 14 hours ago by Sajid 2 replies 1419 views
Answered How to enable a shared directory between the booted guest OS on Morello FVP and the host linux machine Latest 16 hours ago by Andy Nisbet 11 replies 7704 views
Answered ds-5 community edition request link Latest 18 hours ago by Andy Neil 3 replies 132 views