The automotive market incorporates all automotive applications, from advanced driver-assistance systems (ADAS), autonomous drive, in-vehicle infotainment (IVI), and digital cockpit, to powertrain and chassis.

Arm has a range of architecture specifications including processors, system architectures, and software standards. Arm architecture specifications power the different automotive applications with the Arm Architecture as the underlying foundation.

This page provides an overview of Arm system architecture specifications in the automotive market, focusing on three key areas:

  • Hardware system architecture
  • Safety and security
  • Software standards

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System architecture for SoC design | Software standards | Other resources

System architecture for SoC design

Successful System on Chip (SoC) implementation requires attention to many aspects of integration and system architecture. Arm offers system architecture standards in key areas, including interconnect, security, power control, memory management and more.


Power Control System Architecture

Power Control System Architecture (PCSA) provides a power control system architecture for SoCs based on Arm components. This specification is useful to architects and designers of SoCs based on Arm components. Also, for component designers incorporating Arm low-power interfaces for clock and power control. Relevant automotive applications include in-vehicle infotainment, ADAS, autonomous drive, and digital cockpit systems.

The PCSA specification covers:

  • Voltage, power, and clock partitioning and dependencies
  • Power states and modes
  • Arm power control framework and integration principles
  • Arm component-specific power and clock integration
  • Designing IP with Arm low-power Q-Channel and P-Channel interfaces

The PCSA specification (DEN0050) is under development and can be accessed through an NDA by contacting Arm and quoting the document number: DEN0050.

Contact Arm

Trusted Base System Architecture for A-profile

Trusted Base System Architecture for the A-profile architecture (TBSA-A), provides trusted SoC requirements compliant with best practice and key industry standards and specifications.

TBSA provides guidance for the creation of secure platforms that can support Trusted Services. It is intended to be used in the context of the architecture design and verification stage of a secure development lifecycle.

The TBSA-A specification covers:

  • TrustZone technology
  • Security implementation requirements
  • Lifecycle management
  • Debug, peripheral, and memory considerations
  • Requirements checklist
Download TBSA-A

Generic Interrupt Controller

The Generic Interrupt Controller (GIC) architecture provides a standard programming interface for managing, virtualizing and distributing interrupts to A- and R-profile Arm processors. The GIC can provide isolation and interrupt prioritization between different software execution environments.

The GIC specification covers:

  • Interrupt distribution and prioritization
  • Interrupt configuration
  • Interrupt life cycle
  • Software interface for handling interrupts

Download GIC specification

Arm provides GIC IP products that implement the GIC architecture, including GIC-600AE. The GIC-600AE provides more features to meet safety requirements for building high-performance ASIL B to ASIL D systems.

View GIC IP


System Memory Management Unit

The System Memory Management Unit (SMMU) architecture provides a standard programming interface for the partitioning of different input/output (I/O) agents in a mixed-criticality system, for functional and performance isolation. An SMMU is typically used in systems where hardware consolidation is the aim, including high-performance ADAS and digital cockpit applications.

The SMMU specification covers:

  • Association of devices with translation contexts
  • Translation of device transactions
  • Interactions with PCIe and ATS
  • Association of transactions with MPAM partitioning configuration
  • Full compatibility with Armv8-A Virtual Memory System Architecture
  • Interactions between devices and TrustZone

Download SMMU specification


CoreSight architecture and IP

CoreSight technology provides IP to enable measurement, calibration, debug, and performance optimization. IP components compliant with the CoreSight architecture are integrated in a standard way, ensuring support from the tooling ecosystem.

View CoreSight architecture
View CoreSight debug and trace IP


Advanced Microcontroller Bus Architecture

Advanced Microcontroller Bus Architecture (AMBA) is an open standard for the connection and management of functional blocks in a System on Chip. AMBA protocols and interfaces are used extensively in automotive applications.

The AMBA interface parity extension, for example, is used in automotive applications that have resilience or functional safety requirements. It provides end-to-end protection of on-chip communication that can be achieved by taking a modular approach. This modular approach enables resilient systems, even when using components developed by different vendors or with alternative interfaces.

Learn more

Software standards

The use of software standards, and their adoption by operating systems and standard firmware vendors, provides common interfaces. Software standards ease integration and enable greater reuse of software across implementations.


Embedded Base Boot Requirements

The Embedded Base Boot Requirements (EBBR) specification is intended for developers of Arm embedded devices wanting to take advantage of the UEFI technology to separate the firmware and OS development. For example, A-profile embedded devices like networking platforms can benefit from a standard interface that supports features such as secure boot and firmware update.

The specification is intended to be OS-neutral. It applies the prevalent industry standard firmware specifications of UEFI. EBBR is useful for automotive use cases to enable industry standard boot verification and firmware update practices.

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System Control and Management Interface

System Control and Management Interface (SCMI) specifies a set of standard interfaces for power, performance, and system management. SCMI is extensible and provides interfaces to access functions which are implemented in firmware, often in the System Control Processor (SCP).

In automotive platforms, SCMI can be used to abstract power, performance, and system management tasks from an operating system or hypervisor. As a result, SCMI can ease integration and reduce the per-implementation cost of ownership.

The SCMI specification currently provides protocols for:

  • Discovery of supported interfaces
  • Power domain management
  • Performance management
  • Clock management
  • Sensor management
  • Reset management

Download SCMI specification


Secure Monitor Call Calling Convention

The Secure Monitor Call Calling Convention (SMCCC) specification defines a common calling mechanism to be used with the Secure Monitor Call (SMC), and Hypervisor Call (HVC) instructions, in both the Armv7 and Armv8 architectures. The specification defines the pattern in which SMC and HVC instructions, and platform registers can be used. This allows the following entities to communicate with each other:

  • Operating Systems (OSs)
  • Secure monitors and system firmware
  • Hypervisors
  • Trusted OSs.

The SMCCC specification is the basis of communication between EL1 and more privileged exception levels, as such it is a fundamental aspect of other specifications, such as Power State Coordination Interface (PSCI) and Software Delegated Exception Interface (SDEI). The SMCCC also enables platform management use cases. For example, triggering errata workarounds or obtaining SoC identification.

In automotive, any use case requiring services from a privileged exception level uses the SMCCC. Examples of use cases are:

  • Running IVI Digital Rights Management (DRM) routines
  • Access to secure storage
  • Interfacing with a separation kernel at EL2

Download SMCCC specification


Power State Coordination Interface

Power State Coordination Interface (PSCI) is a standard interface for power management. PSCI can be used by OS vendors for supervisory software, working at different levels of privilege on Arm. Rich operating systems (like Linux), hypervisors, secure firmware, and Trusted OS implementations must interoperate when power is being managed.

The aim of this standard is to ease the integration of supervisory software from different vendors. This is of paramount importance in automotive applications like in-vehicle infotainment, digital cockpit systems, and ADAS.

The PSCI specification defines an interface for:

  • Core idle management
  • Dynamic addition and removal of cores, and secondary core boot
  • System suspend, shutdown, and reset.

PSCI layers onto SCMI and works with hardware discovery technologies, for example Flattened Device Tree (FDT) and Advanced Configuration and Power Interface (ACPI).

Download PSCI specification


Arm software standards

Access all Arm software standards for use in automotive, including the specifications through the software standards page.

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Other resources