This guide introduces the Arm architecture for anyone with an interest in it. No prior knowledge of the Arm architecture is needed, but a general familiarity with processors and programming and their terminologies is assumed.
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This guide introduces the exception and privilege model in Armv8-A. This guide covers the different types of exceptions in the Arm architecture, and the behavior of the processor when it receives an exception.
This guide introduces the A64 instruction set, used in the 64-bit Armv8-A architecture, also known as AArch64.
This guide introduces memory translation in Armv8-A, which is key to memory management. It explains how virtual addresses are translated to physical addresses, the translation table format, and how software manages the Translation Lookaside Buffers (TLBs).
This guide introduces the memory model in Armv8-A. It begins by explaining where attributes that describe memory come from and how they are assigned to regions of memory. Then it introduces the different attributes that are available and explains the basics of memory ordering.
This guide explains extensions to the Arm architecture and provides guidance on how to read and use them.
This guide is in currently in development. In the meantime, you can read GICv3 and GICv4 Software Overview Release B Documentation.
This guide describes the virtualization support in the Armv8-A AArch64. Topics covered include stage 2 translation, virtual exceptions and trapping. The guide also includes some basic virtualization theory as an introduction, and gives some examples of how a hypervisor might use the features that it describes.
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We're working on a new guide. Until it's ready, you can read our Application Note Bare-metal Boot Code for ARMv8-A Processors.
This guide describes concepts that are useful to know before debugging an Armv8-A processor.
This guide focuses on characteristics that are common to bare-metal debuggers that target the Armv8-A architecture. It also covers what you need to know when you work with debuggers, and possible consequences of their use.
This guide introduces Arm Neon technology, the Advanced SIMD (Single Instruction Multiple Data) architecture extension for processors that implement the Armv8–A or Armv8–R architecture profiles.
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