ARM’s developer website includes documentation, tutorials, support resources and more.
Over the next few months we will be adding more developer resources and documentation for all the products and technologies that ARM provides.
CloseSorry, your browser is not supported. We recommend upgrading your browser. We have done our best to make all the documentation and resources available on old versions of Internet Explorer, but vector image support and the layout may not be optimal. Technical documentation is available as a PDF Download.
Arm Research publishes their work on a wide variety of topics in highly regarded conferences and journals around the world. Find out more about our most recently published work below. Go to section:
Computer Architecture | Devices, Circuits, and Materials | HPC | IoT | Machine Learning | Security | Software and Services
| Publication title | Conference/Journal | Authors |
Date |
Further resources |
| Eliminating Fences via ISA Support for Instruction-Level Execution Dependencies |
ISCA 2021 |
T.Shull, I. Vougioukas, N. Nikoleris, W. Elsasser, J. Torrellas |
June 2021 | |
| Speculative Vectorization with Selective Replay |
ISCA 2021 |
P. Sun, G. Gabrielli, T. Jones |
June 2021 | |
| Bandwidth Utilization Side-Channel on ML Inference Accelerators |
ISCA 2021 |
S. Banerjee, S. Wei, P. Ramrakhyani, M. Tiwari |
June 2021 | |
| Re-establishing Fetch-Directed Instruction Prefetching: An Industry Perspective |
ISPASS 2021 |
Y. Ishii, J. Lee, K. Nathella, D. Sunwoo |
March 2021 | Watch presentation |
| BBB: Simplifying Persistent Programming using Battery-Backed Buffers |
HPCA 21 |
M. Alshboul, P. Ramarakhyani, W. Wang, J. Tuck, and Y. Solihin |
February 2021 | Read blog |
| Whitepaper: Understanding Write Combining on Arm |
Arm Whitepaper |
P. Shamis |
November 2020 | |
| Energy-aware HW/SW Co-modeling of Batteryless Wireless Sensor Nodes |
ENSsys |
S. Wong S. Sliper W. Wang A. Weddell S. Gauthier G. Merrett |
November 2020 | |
| AOS: Hardware-based Always-On Heap Memory Safety |
MICRO |
Y. Kim |
October 2020 | |
| Towards Data-Flow Parallelization for Adaptive Mesh Refinement Applications |
CLUSTER | K. Sala A. Rico V. Beltran |
September 2020 | |
| Securing Branch Predictors With Two-Level Encryption | J. Lee Y. Ishii D. Sunwoo |
July 2020 | ||
| Relaxed Persist Ordering Using Strand Persistency | V. Gogte W. Wang S. Diestelhorst P. Chen S. Narayanasamy T. Wenisch |
June 2020 | Read blog | |
| Implementation of a flexible cache coherency protocol for the Ruby memory system | T. Muck P. Benedicte |
May 2020 | ||
| DRAM Memory Controller Updates | W. Elsasser N. Nikoleris |
May 2020 | Watch presentation | |
| The Non-Uniform Compute Device (NUCD) Architecture for Lightweight Accelerator Offload |
PDP | M. Asri C. Dunham R. Rusitoru A. Gerstlauer J Beard |
March 2020 | |
| Shredder: Learning Noise Distributions to Protect Inference Privacy | P. Ramrakhyani H. Esmaeilzadeh F. Mireshghallah |
March 2020 | Watch presentation | |
| Rebasing Instruction Prefetching: An Industry Perspective |
CAL | Y. Ishii (CE-CPU) J. Lee K. Nathella D. Sunwoo |
February 2020 | |
| Fused: Closed-loop Performance and Energy Simulation of Embedded Systems | S. T. Sliper W. Wang N. Nikoleris A. S. Weddell G. V. Merrett |
January 2020 | ||
| Temporal Prefetching Without the Off-Chip Metadata | H. Wu K. Nathella J. Pusdesris D. Sunwoo A. Jain C. Lin |
October 2019 | ||
| Directed Statistical Warming through Time Traveling | N. Nikoleris L. Eeckhout E. Hagersten T. E. Carlson |
October 2019 | ||
| DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management | Z. Huang J. Joao A. Rico A. Hilton B. Lee |
October 2019 | ||
| SPiDRE: Accelerating Sparse Memory Access Patterns |
PACT | A. Barredo J. Beard M. Moreto |
September 2019 | See PDF |
| Multi-spectral Reuse Distance: Diving Spatial Information from Temporal Data |
HPEC | A. Cabrera R. Chamberlain J. Beard |
September 2019 | |
| Reducing Data Movement and Energy in Multilevel Cache Hierarchies Without Losing Performance: Can you have it all? | J. Wang P. Ramrakhyani W. Elsasser L. K. John |
September 2019 | ||
| Efficient Metadata Management for Irregular Data Prefetching | H. Wu K. Nathella D. Sunwoo A. Jain C. Lin |
June 2019 | ||
| Sampled Simulation of Task-Based Programs | T. Grass T. Carlson A. Rico G. Ceballos E. Ayguadé M. Casas M. Moreto |
February 2019 | ||
| BRB: Mitigating Branch Predictor Side-Channels | I.Vougioukas N.Nikoleris A.Sandberg S.Diestelhorst G.V. Merrett B.M. Al-Hashimi |
February 2019 | Read blog | |
| Whitepaper: Introducing the new Armv8.1-M architecture | T. Grocutt | February 2019 | Read blog | |
| Nucleus: Finding the Sharing Limit of Heterogeneous Cores | I. Vougioukas A. Sanberg B. M. Al-Hashimi Geoff V. Merrett |
October 2017 | ||
| A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications | X. Iturbe B. Venu E. Ozer S. Das |
October 2017 | ||
| The Arm Scalable Vector Extension | N. Stephens S. Biles M. Boettcher J. Eapen M. Eyole G. Gabrielli M. Horsnell G. Magklis A. Martinez M. Premillieu A. Reid A. Rico P. Walker |
April 2017 | Read blog |
| Publication title | Conference/Journal | Authors |
Date |
Further resources |
| A Fokker-Planck Solver to Model MTJ Stochasticity |
ESSDERC 2021 | F. Garcia-Redondo, P. Prabhat, M. Bhargava |
September 2021 | |
| A Compact Model for Scalable MTJ Simulation |
SMACD 2021 | F. García-Redondo, P. Prabhat, M. Bhargava, C. Dray |
July 2021 | |
| A Natively Flexible 32-bit Arm Microprocessor |
Nature | J. Biggs, J. Myers, J. Kufel, E. Ozer, S. Craske, A. Sou, C. Ramsdale, K. Williamson, R. Price, S. White |
July 2021 | |
| A High-Density Logic-On 3DIC Design Using Face-to-Face Hybrid Wafer-Bonding on 12nm FinFET Process |
IEDM | S. Sinha et al | December 2020 | |
| Buried Bitline for sub-5nm SRAM Design |
IEDM | R. Mathur et al | December 2020 | |
| Plasmonics: Breaking the Barriers of Silicon Photonics for High-Performance Chip-to-Chip Interconnects |
IEDM 20 | C. Lin, D. Prasad; S. Sinha, B. Cline, A.S. Helmy |
December 2020 | |
| A Supply Voltage Control Method for Performance Guaranteed Ultra-Low-Power Microcontroller |
IEEE Journal of Solid-State Circuits |
B. Labbe P. Fan T. Achuthan P. Prabhat G. Knight J. Myers |
September 2020 | Read blog |
| A Spike-Latency Transceiver with Tuneable Pulse Control for Low-Energy Wireless 3D Integration | B. Fletcher S. Das Te. Mak |
September 2020 | ||
| Bespoke Machine Learning Processor Development Framework on Flexible Substrates |
IEEE FLEPS |
Emre Ozer Jedrzej Kufel John Biggs Gavin Brown James Myers Anjit Rana Antony Sou Catherine Ramsdale |
July 2020 | |
| A hardwired machine learning processing engine fabricated with sub-micron metal-oxide thin-film transistors on a flexible substrate | E. Ozer J. Kufel J. Myers J. Biggs G. Brown A. Rana A. Sou C. Ramsdale S. White |
July 2020 | Read blog | |
| Enhanced 3D Implementation of an Arm® Cortex®-A | X. Xu M. Bhargava S. Moore S. Sinha B. Cline |
July 2020 | ||
| GeST: An automatic framework for generating CPU stress-tests |
ISPASS |
Z. Hadjilambrou S. Das P.N. Whatmough D. Bull Y. Sazeides |
March 2020 | |
| M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power |
Pranay Prabhat Benoît Labbe Graham Knight Anand Savanth Jonas Svedas Matthew J Walker Supreet Jeloka Philex Ming-Yan Fan Fernando García-Redondo Thanusree Achuthan James Myers |
February 2020 | Read blog | |
| Buried Power Rails and Back-side Power Grids: Arm® CPU Power Delivery Network Design Beyond 5nm | D. Prasad S. S. T. Nibhanupudi S. Das O. Zografos B. Chehab S. Sarkar R. Baert A. Robinson A. Gupta A. Spessot P. Debacker D. Verkest J. Kulkarni B. Cline S. Sinha |
December 2019 | Read blog | |
| Error Correlation Prediction in Lockstep Processors for Safety-Critical Systems | E. Ozer B. Venu X. Iturbe S. Das S. Lyberis J. Biggs P. Harrod J. Penton |
October 2018 | Read blog | |
| Standard Cell Library Design and Optimization Methodology for ASAP7 PDK | X. Xu N. Shah A. Evans S. Sinha B. Cline G. Yeric |
July 2018 | Read blog |
| Publication title | Conference/Journal | Authors |
Date |
Further resources |
|
| PLANAR: a programmable accelerator for near-memory data rearrangement |
ICS 2021 | A. Barredo, A. Armejach, J. Beard, M. Moreto |
June 2021 | ||
| Asvie: A Timing-Agnostic SVE Optimization Methodology | M. T. Cruz D. Ruiz R. Rusitoru |
November 2019 | |||
| Cache Line Sharing and Communication in ECP Proxy Applications | J. Randall A. Rico J. A. Joao |
September 2019 | Read blog | ||
| On the Benefits of Tasking with OpenMP | A. Rico I. S. Barrera J. A. Joao J. Randall M. Casas M. Moretó |
September 2019 | Read blog | ||
| On the Maturity of Parallel Applications for Asymmetric Multi-core Processors | K. Chronaki M.Moretó M. Casas A. Rico R. M. Badia E. Ayguadé M. Valero |
May 2019 |
| Publication title | Conference/Journal | Authors |
Date |
Further resources |
| Talk: It’s time to tame the wild west of IoT device security |
HOST |
R. Aitken |
December 2020 | |
| Whitepaper: Post-Quantum Cryptography |
Arm Whitepaper |
H. Becker |
October 2020 | |
| Talk: How can hardware security contribute to the fight against Covid-19 and post-pandemic life? |
HOST |
R. Aitken |
July 2020 | |
| ISA Semantics for ARMv8-A, RISC-V, and CHERI-MIPS | A. Armstrong T. Bauereiss B. Campbell A. Reid K. E. Gray R. M. Norton P. Mundkur M. Wassell J. French C. Pulte S. Flur I. Stark N. Krishnaswami P. Sewell |
January 2019 | ||
| BRB: Mitigating Branch Predictor Side-Channels. | I. Vougioukas N. Nikoleris A. Sandberg S. Diestelhorst B. M. Al-Hashimi G. V. Merrett |
November 2018 | Read blog | |
| The semantics of transactions and weak memory in x86, Power, ARM, and C++ | N. Chong T. Sorensen J. Wickerson |
June 2018 | Read blog |
Important Information for the Arm website. This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies. If you are not happy with the use of these cookies, please review our Cookie Policy to learn how they can be disabled. By disabling cookies, some features of the site will not work.